Alchip Launches 2nm Design Platform for HPC and AI ASICs, Eyes TSMC N2 and A16 RoadmapAlchip Technologies, a global leader in high-performance computing…Read More
Protecting Sensitive Analog and RF Signals with Net ShieldingBy Hossam Sarhan Communication has become the backbone…Read More
CEO Interview with Jonathan Reeves of CSignumFor more than 30 years, Jonathan has successfully…Read More
CEO Interview with Shelly Henry of MooresLabAIShelly Henry is the CEO and Co-Founder of MooresLabAI,…Read More
When it comes to the privacy and security of data, what does the future hold for consumers, companies and governments?
A tremendously interesting document, called “Alternate Worlds,” was published by the U.S. National Intelligence Council. It’s a serious document that not only examines four different alternatives of what … Read More
The Applied Materials earnings call was last week. As usual I”m not all that interested in the financial details of the quarter and I’m certainly not the person to pick whether the stock is going to go up or down in the immediate future. However, there is always interesting information to be gleaned from the semiconductor… Read More
It happens at every process node, professional journalists write that something is broken and blames TSMC like a worn out record. To be fair they are not semiconductor professionals with access to the fabless semiconductor rank and file and are easily manipulated which is what happened again at 20nm. Remember when NVIDIA suggested… Read More
Lately there has been significant concern over the rising costs of designing in silicon and the troubling decline in venture investments in semiconductors. These alarming trends include fewer IPOs, a falloff in the amount and frequency of early stage seed investments, and comparatively low industry organic growth rates. A … Read More
I got really involved in testability back at CrossCheck in the 1990’s when they designed a way for Gate Arrays to have 100% observability without any Design For Test (DFT) requirements on designers. The Japanese Gate Array companies loved this approach and their customers enjoyed the highest test coverage without being… Read More
Using an assertion is a sure shot method to detect an error at its source, which may be buried deep within a design. It does not depend on a test bench or checker, and can fire automatically as soon as a violation occurs. However, writing assertions manually is very difficult and time consuming. To do so require deep design and coding… Read More
Doing a modern SoC design is all about assembling IP and adding a small amount of unique IC design for differentiation (plus, usually, lots of software). If you re designing in a mature process then there is not a lot of difficulty finding IP for almost anything. But if you are designing in a process that has not yet reached high-volume… Read More
One of the recurring themes I see here in the pages of SemiWiki and elsewhere is this pitched, bordering on religious battle between Altera and Xilinx. Just because both are FPGA technologies, the tendency is to put them in the same bucket, drawing direct comparisons between them. Some folks say there is no comparison; Xilinx has… Read More
Advanced Driving Assistance Systems (ADAS) are an essential element in the vision of autonomous or semi-autonomous vehicles, and they are becoming available today. The ADAS automotive technology raises driving safety by detecting obstacles around the vehicle such as other vehicles and pedestrians, as well as traffic signs… Read More
At the SEMI International Strategy Symposium last month, one of the keynotes was by Jim Elliot, the CVP of Memory Marketing for Samsung. Unfortunately, due to some personal emergency, he wasn’t able to make it. But he did allow the slides of the presentation he would have given to be put up on the SEMI website. So here, for the… Read More
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