Semidynamics Shakes Up Embedded World 2024 with All-In-One AI IP to Power Nextgen AI ChipsSemidynamics takes a non-traditional approach to design enablement.…Read More
Silicon Catalyst partners with Arm to launch the Arm Flexible Access for Startups Contest!Winner and Runner-up to receive the contest’s largest…Read More
Synopsys Design IP for Modern SoCs and Multi-Die SystemsSemiconductor intellectual property (IP) plays a critical role…Read More
Enhancing the RISC-V Ecosystem with S2C Prototyping SolutionRISC-V's popularity stems from its open-source framework, enabling…Read More
The SEMICON West website has a nice “speakers” option where you can search by company and see who is talking about what. I’m always interested in what Intel has to say (they are still the leading semiconductor company) so here is the line-up for next week:
Intel Sanchali Bhattacharjee Subcomponent Supply Chain for 10nm and Beyond… Read More
This will probably end up being the most memorable DAC for us since Paul and I signed hundreds of copies of our book “Fabless: The Transformation of the Semiconductor Industry”. I’m not sure how we are going to top that next year but I’m confident we will think of something. If you want to catch up on the live blogs from the last three conferences… Read More
It goes without saying that VIPs really play a Very Important Part in SoC verification today. It has created a significant semiconductor market segment in the fabless world of SoC and IP design & verification. In order to meet the aggressive time-to-market for IPs and SoCs, it’s imperative that readymade VIPs which are proven… Read More
Tuesday night over dinner at DAC I was able to chat with Ravi Subramanian, CEO of Berkeley DA, recently acquired by Mentor Graphics back on March 21st. This acquisition provided Mentor with an Analog FastSPICE circuit simulator to round out its collection of simulators.… Read More
The act of authentication is very straightforward. Essentially, it is making sure that something is real.
There are two parts to authentication:
[LIST=1]
Authentication in the “crypto-verse” typically happens on a host and client basis where the host wants to ensure that a client is
If you hang around engineers for any time at all, the word optimization is bound to come up. The very definition of engineer is to contrive or devise a solution. With that anointing, most engineers are beholden to the idea that their job is creating, synthesizing, and perfecting a solution specifically for the needs of a unique situation.… Read More
I have been alerted by a blog from Moshik Rubin from Cadence: PCI-SIG has finally released the PCIe 4.0 rev 0.3 specification for members’ review, on time for the PCI-SIG developers conference last June in Santa Clara. Since the early days of PCI Express in 2005, Denali (at that time, now Cadence) has positioned the PCIe VIP… Read More
In the early days of Customer Owned Tooling (COT) the signoff was done at the GDS II, or physical level. Today, however we see the trend of RTL signoff instead because of the EDA tools and methodology available. At DACearlier this month I met with Piyush Sanchetiof Atrenta to get an update on what’s new with RTL signoff.… Read More
Synopsys announced verification compiler a couple of months ago and dropped hints about their static and formal verification. They haven’t announced anything much for a couple of years and it turns out that the reason was that they decided that the technology that they had, some internally developed and some acquired, … Read More
EDA industry pundit Gary Smithhas been talking about the electronics industry adopting an ESL tool flow for decades, so it was my pleasure to speak with Bill Neifertof Carbon Design Systemsat DAC this month because his company has been offering both tools and models that enable a virtual prototyping design flow.… Read More
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ASML- Soft revenues & Orders – But…China 49% – Memory Improving