Semiwiki Ansys SimWorld

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                    [post_content] =>  
Don’t get me wrong, I’m a big fan of AMD, I buy AMD based products whenever possible to prevent an innovation stifling Intel monopoly. Unfortunately Silicon Valley coffee house conversations continue to paint a bleak picture for AMD, even with a recent stock surge on better than expected revenue guidance for the rest of 2011. I’m sure Wall Street coffee house conversations do not track with ours and here’s why:

Intel has always been the semiconductor manufacturing technology leader but throughout the years AMD was very clever and kept pace. Unfortunately AMD went fabless last year and as a result will not be able to compete in the discrete microprocessor market (my opinion). AMD also has no mobile strategy so where will they be when tablets and phones replace laptops?

Today AMD is in production at 32nm SOI with the Ex AMD fab in Dresden which is very competitive with the current Intel 32nm HKMG process. Future AMD microprocessor generations however will use commercially available foundry processes which track a process node or two BEHIND Intel. You should also know that microprocessor manufacturing is unique and may not 100% adapt to a more generic foundry process.

Source: TechConnect

Mid next year AMD will have CPU/GPUs on 28nm HKMG processes but will they be price/performance competitive with the Intel 22nm Tri-Gate technology? The answer is probably NO, not in the discrete microprocessor market. Intel will also be the first to 450mm manufacturing which will bring a dramatic costs savings versus mainstream 300mm semiconductor manufacturing.

A glaring non-compete example is gross margins. How can AMD again achieve the 50%+ margin average required to compete profitably against Intel? AMD’s gross margins fell below 40% in 2008 and have yet to recover. As an example, take the most recent AMD Wafer Supply Agreement Amendment. A detailed analysis of this agreement is a blog in itself, especially with all of the redacted areas. Skip down to pages 8, 9, and 10 where the financial details are and tell me how AMD will even hit 40% gross margins in 2012. If you disagree let me know in the comment section and we can discuss in more detail.

To make a long blog short, AMD needs an exit strategy to be competitive with the Intel CPU dynasty. My first choice would be ATIC taking AMD private and integrating it with GlobalFoundries. Second choice would be for Samsung to buy AMD. Either way there would be a viable competitor to Intel. Or not, but it would certainly be fun to watch!

Don’t get me wrong, I’m not bashing ANYBODY here, I do this blog out of love. The SemiWiki mission statement is “For the greater good of the semiconductor design ecosystem”. I admire ATIC and what they have done for the semiconductor industry, I respect the accomplishments of AMD, and I’m the #1 fan of GlobalFoundries. But let's be honest, Intel is a force to be reckoned with and we had all be better prepared for the coming war of microprocessors!

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[post_title] => Samsung to Acquire AMD? [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => samsung-to-acquire-amd [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:39:38 [post_modified_gmt] => 2019-06-15 02:39:38 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/samsung-to-acquire-amd.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [1] => WP_Post Object ( [ID] => 676 [post_author] => 9491 [post_date] => 2011-08-07 15:28:00 [post_date_gmt] => 2011-08-07 15:28:00 [post_content] =>  The last of the current series of webinars is on Sentinel-PSI,IC-Package, Power and Signal Integrity Solution. It will be at 11am Pacific time on Thursday 11th August. It will be conducted by Dr. Tao Su, product manager of the Sentinel products. Dr. Su has many years of experience in the EDA industry and is specialized in power integrity and signal integrity analysis for package and PCB. He received his Bechelor’s degree in Electrical Engineering from Tsinghua Univ., Beijing, China, and his MS and PhD degree from the University of Texas at Austin.

This is a 3D full-wave electromagnetic solver for power and signal integrity analysis of IC package and PCBs, with the ability to perform DC (static), AC (frequency domain), and transient (dynamic) simulations from a single environment. Based on the fast finite element method (FFEM), Sentinel-PSI provides the accuracy of a conventional full-wave tool, with the unparalleled capacity to handle an entire package or board design. Sentinel-PSI is seamlessly connected to other Apache products in system-level analysis, and is linked with Sentinel-SSO to perform system-level I/O-SSO simulations.

Register for the webinar here.



 [post_title] => Sentinel-PSI Webinar [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => sentinel-psi-webinar [to_ping] => [pinged] => [post_modified] => 2019-06-14 20:52:50 [post_modified_gmt] => 2019-06-15 01:52:50 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/sentinel-psi-webinar.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [2] => WP_Post Object ( [ID] => 679 [post_author] => 20367 [post_date] => 2011-08-07 13:11:00 [post_date_gmt] => 2011-08-07 13:11:00 [post_content] =>  Intel will not win the tablet market with any of the various Atom chips rolling out at 32nm, 22nm and even 14nm. They are too late to a game that Apple owns 90% of today and will so in the future. All of these ultra low power atom versions are like the Saturn test rocket developments that preceded the Apollo 11 Moon Landing. They are necessary test chips where engineers at Intel try out new circuit designs and architectural tradeoffs in tuning power vs performance in preparation for a set of chips co-architected with Apple and appearing in 14nm.

Many threads lead me to the above conclusion. But from a business perspective there are huge benefits to Apple and Intel joining hands. The 90% market share in the tablet market and the growth coming from the MAC Air notebooks are key indicators to the future of the mobile market. Both are kissing cousins in term of their form-factors and hardware features. The clear driver for the form-factors was economical Flash memory in substitution for HDDs and the elimination of DVD drives. The thickness shrunk and the weight dropped to the point you can hold them with one hand comfortably.

There are two main differences. First is the light iOS of the iPAD and the heavier MAC O/S of the MAC Air. And Second is the $25 ARM A5 processor in the iPAD vs. the $220 Intel i5 ULV in the MAC Air. A merging of OS interoperability and lower x86 CPU pricing is coming.

With a co-architected family of processors running in Intel’s fab – the costs of today’s $25 A5 could drop to as low as $15. The math is key here. Let’s say at the low end Apple ships 50MU pads in 2014 at a $10 savings using Intel (based on smaller die) = $50MU *$10 = $500M. Now factor in market share gains that Apple would accrue if they added a higher performance CPU based iPAD at similar battery life (something Intel can deliver). Apple stretches out their market TAM while retaining a high market share with Intel delivering the CPUs. But what would the high end of the CPU line look like for iPAD? Start looking at the MAC Air.

The low end line of the MAC Air sells for $999 and uses the $220 Sandy Bridge i5 ULV processor. This $ percentage of CPU to system price is very high historically for Intel and is one of the reasons the PC Clones are having difficulty undercutting Apple’s $999 price. Intel knows if they don’t offer a much lower cost CPU, then the iPAD cannibalizes the low end, light-weight notebook PC market.

To the plus side for Intel, the attractiveness of the MAC Air package and its ability to run all MAC O/S Apps makes it a competitive alternative to the iPAD. If customers had the choice of a MAC Air that sells for $200 or $300 less and an iPAD, then I believe a large majority would choose the MAC Air. This is my cursory read having played in this market a long time.

At the moment and for the next 12 months, Intel’s hands are tied. The MAC Air uses an Intel ULV processor that has a TDP of 17W. Intel can not yield enough at this power level that would allow them to sell a low end processor (an i3 ULV for $75). At $150 reduction, a system price would drop by $300 to $699.

With Ivy Bridge (using 22nm Tri Gate process), Intel will get an immediate drop in TDP by 50% at the same performance level and cores and caches. Look for Intel to yield near 100% at 17W TDP to enable a $75 CPU by mid 2012. Then look for them to introduce a lower power ULV at around 9-10W at the same yield and price points today. So does Apple go more aggressive MAC Air in mid 2012 with a 10W TDP while the PC clones are going with the 17W TDP. My guess is yes and it will allow them to claim more battery life and retain higher pricing (maybe $899 at the lowest). The key here is that Apple wants the iPAD to flourish and expand rapidly in the next 18 months so that it is effectively game over for tablet competitors. They than can decide to balance the iPAD vs MAC Air volume.

Intel will turn the crank one more time with the Haswell architecture in 2013 where the TDP will be lowered again and Intel will offer aggressive price points on x86 processors that demonstrate 3-7W TDP. Standby power will be extremely low and the advantages of ARM’s low power are eliminated. Then it is a game of who can build what the cheapest.

There have several speculative articles lately on Apple using a future multi-core A6 in MAC Air to lower the cost and to set their own destiny. Furthermore by 2016 they would get to a 64 bit quad core and replace x86 in MAC Book Pro and the desktop. I think these rumors are spread for a reason. Apple wants to see better pricing out of Intel so that they can gain market share in the MAC Air and MAC Book Pro. Apple can not execute completely on their vision of winning the corporate market with products that use just Intel’s mid range and high end processors. In other words they are not using anything less than $200 on Intel’s price list.

As Apple scans out over the horizon then, they see that their dominance in Tablet and iPhone can come to fruition in the PC space if they get a few things that are unique to them and not available to others. This is where, if they play the Intel relationship right they can drive their 5% worldwide market share into high double digits. This may sound over the top … but there are changes on the way to MAC Pro as well that complete Apple’s frontal attack.

Part of Apple’s brand is based on things that they develop and in some cases based on a co-marketing development. The A4, A5 and A6 are seen as their gift to the mobile world in terms of performance at the right power. The Thunderbolt I/O developed with Intel and released before the rest of the world had access to it is a good example of technology co-marketing.

For Apple to retain its brand leadership, it needs to co-architect and be first to market with a new multicore processor that combines Intel x86 and process technology with a future A6 that includes Apple’s specified graphics. The multi-core solution will run both iOS and MAC OS. These processors will be built in 14nm and out the door late 2013 or 1H 2014. Intel will build a family of A6/x86 combo processors to allow low to moderately priced CPUs. Apple will have sole rights to the chips and can hide from its competitors the true cost of the CPUs. Apple MAC based PC will drop in price. On Intel’s side, they can continue to serve legacy x86 markets without a price conflict.

Finally Intel will use the Apple partnership to leverage other large volume customers to consider a partnership with x86 based CPUs that include customer proprietary IP and functions. But again Apple has the lead on others. This will be a win for Apple in terms of performance, cost and technology leadership. This will also be a win for Intel as it increases its overall market share in selling high $$$ sand.



 [post_title] => Apple Roadmaps Intel to 14nm [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => apple-roadmaps-intel-to-14nm [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:39:36 [post_modified_gmt] => 2019-06-15 02:39:36 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/apple-roadmaps-intel-to-14nm.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [3] => WP_Post Object ( [ID] => 687 [post_author] => 4 [post_date] => 2011-08-07 05:42:00 [post_date_gmt] => 2011-08-07 05:42:00 [post_content] => …when Synopsys is getting the lion’s share in Interface IP. In Q2 2010, there was two major acquisitions in EDA world: Synopsys has bought Virage Logic (for more than $300M) when Cadence bought Denali for an equivalent amount. Synopsys bought a 100% IP focused company, when Cadence bought a strongly VIP focused company. Does it sound like Yalta in EDA world? Let’s have a look today at Cadence positioning in the VIP market, and keep for another blog Synopsys positioning in the IP territory.







Cadence preference for the VIP market is not dated from 2010. Back in 2008, Cadence made the acquisition of verification IP (VIP) assets from Yogitech SpA, IntelliProp Inc., and HDL Design House. to expands its existing VIP portfolio by five times to include over 30 standard protocols for wireless, networking, storage, multimedia, automotive, and more. With Denali acquisition, Cadence has even more heavily invested into VIP market as they bought a strong VIP port folio and competencies, mostly based on Memory (the “memory models” for standard products and DDRn VIP), and also PCIe and USB. Some leading edge IP were also in the basket, with PCIe 3.0 and even more important, DDRn memory controller, a segment where Denali has always had a good share, allowing Cadence to put a stone in Synopsys garden.



When you consider that Synopsys integrates their VIP into Design Ware, which means they do not try to value each VIP, you may think that Cadence should extract most of the value from the VIP segment, as they market one (functional verification) product by protocol standard. The list of supported protocol has been recently updated, and demonstrates the strong commitment of Cadence to this market:

· AMBA 4

· AMBA AHB

· AMBA AXI

· AMBA APB

· CAN

· Ethernet

· HDMI

· I2C

· JTAG

· LIN

· MIPI CSI-2

· MIPI DSI

· MIPI M-PHY

· MIPI SLIMbus

· MIPI UniPro

· MIPI DigRF v4

· OCP

· PCI Express

· PCI

· PLB

· SAS

· Serial ATA (SATA)

· Serial Rapid IO

· USB (with OTG)

· USB SuperSpeed
· DDR2

· DDR3

· DDR4

· DDR4 SDRAM

· DDR NVM

· EEPROM

· Flash ONFI 3.0

· Flash PPM

· Flash Toggle2NAND

· GDDR3

· GDDR4

· GDDR5

· LBA NAND

· LPDDR2

· LRDIMM

· MMC 4.41

· One NAND

· QDR SRA

· SD/SDIO 2.0

· SD/SDIO 3.0

· SDRAM

· SRAM

· SRAM cellular

· Toggle NAND

· Wide I/O SDRAM


























































We have updated the VIP wiki to reflect the strong focus put by Cadence on the VIP products. Unfortunately we are missing a key factor: the weight, in term of revenue, of the VIP market. There is no market survey giving even an evaluation of the $ value of this segment. We have said previously in Semiwiki that “IP would be nothing without VIP” and we have tried to evaluate the size of this segment. The conclusion was it could be anything between $200M to $500M… Not a very precise evaluation, I agree. If anybody wants to challenge it, feel free to post a comment!



That we can say is that Cadence, with the current offer supporting more than 50 protocol standards, will certainly get a strong market share of VIP, maybe in the same range than Synopsys market share in the Interface IP segment (also based on protocol standards or specifications), or about 50% of the segment. If anybody from Cadence wants to comment this assertion, feel free to post a comment!



Eric Esteve from IPnest [post_title] => Yalta in EDA: Cadence stronger in VIP territory… [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => yalta-in-eda-cadence-stronger-in-vip-territory [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:39:35 [post_modified_gmt] => 2019-06-15 02:39:35 [post_content_filtered] => [post_parent] => 0 [guid] => https://35.226.139.164/uncategorized/687-yalta-in-eda-cadence-stronger-in-vip-territory/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 2 [filter] => raw ) [4] => WP_Post Object ( [ID] => 681 [post_author] => 3 [post_date] => 2011-08-06 21:29:00 [post_date_gmt] => 2011-08-06 21:29:00 [post_content] => I've blogged about the Calibre family of IC design tools before:

Smart Fill replaced Dummy Fill Approach in a DFM Flow
DRC Wiki
Graphical DRC vs Text-based DRC
Getting Real time Calibre DRC Results with Custom IC Editing
Transistor-level Electrical Rule Checking
Who Needs a 3D Field Solver for IC Design?
Prevention is Better than Cure: DRC/DFM Inside of P&R
Getting to the 32nm/28nm Common Platform node with Mentor IC Tools

If you want some hands-on time with the Calibre tools then consider attending the August 11th workshop in Irvine, CA.

[post_title] => August 11th - Hands-on Workshop with Calibre: DRC, LVS, DFM, xRC, ERC [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => august-11th-hands-on-workshop-with-calibre-drc-lvs-dfm-xrc-erc [to_ping] => [pinged] => [post_modified] => 2011-08-06 21:29:00 [post_modified_gmt] => 2011-08-06 21:29:00 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/august-11th-hands-on-workshop-with-calibre-drc-lvs-dfm-xrc-erc.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [5] => WP_Post Object ( [ID] => 678 [post_author] => 9491 [post_date] => 2011-08-05 18:04:00 [post_date_gmt] => 2011-08-05 18:04:00 [post_content] =>  SNUG in Silicon Valley was in March so either you were there or you've missed it. But it is the summer (and fall) of SNUG in the rest of the world:

SNUG China (in Beijing, Shanghai, Shenzhen) on August 22nd-30th
SNUG Singapore on August 23rd
SNUG Taiwan (in Hsinchu) on August 25-26th
SNUG Japan (in Tokyo) on September 7th
SNUG Canada (in Ottowa) on September 19th
SNUG Boston on September 29th
SNUG Austin on October 3rd

Full details here.



 [post_title] => SNUG outside Silicon Valley [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => snug-outside-silicon-valley [to_ping] => [pinged] => [post_modified] => 2019-06-14 20:52:49 [post_modified_gmt] => 2019-06-15 01:52:49 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/snug-outside-silicon-valley.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [6] => WP_Post Object ( [ID] => 677 [post_author] => 9491 [post_date] => 2011-08-05 17:34:00 [post_date_gmt] => 2011-08-05 17:34:00 [post_content] =>  Formal verification has grown in importance as designs have grown and it has become necessary to face up to the theoretical impossibility of using simulation to get complete coverage along with the practical impossibility of simulating enough to even get close.

There are a number of solvers for what is called satisfiability (SAT) but these work in a rather rarefied theoretical environment different from the way designers work. So it is necessary to add a modeling layer to connect properties in the designer's world to the types of equations that the solvers can prove. Some properties require additional logic to be added to the design in order to convert, for example, a temporal property into one that an SAT engine can prove.

The modeling layer takes in the design description, the property/properties to be verified, the initial state of the design and any constraints. It then transforms these into the formal equations required by the SAT solver. The solver attempts to find a "witness" for each property. A witness is a sequence of input vectors that make the property true while satisfying all the constraints.

The SAT solver produces one of 3 outcomes:
[LIST=1]
  • Pass, a witness was found
  • Fail, the solver can prove that no witness can exist
  • Undecided, it couldn't either find a witness nor prove that one is impossible

    As an aside, formal verification products are quite interesting to sell. Typically, to evaluate them, the customer will have an application engineer run an old design through the tool, one that is already in production. It is interesting when the design promptly fails and a sequence is found that causes the design to do something it shouldn't. Of course, you don't tell the customer all the problems, they need to buy the tool to find that out.

    Atrenta's white papers on formal verification, which go into a lot more detail, are available here.



     [post_title] => Assertion-based Formal Verification [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => assertion-based-formal-verification [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:39:35 [post_modified_gmt] => 2019-06-15 02:39:35 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/assertion-based-formal-verification.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [7] => WP_Post Object ( [ID] => 675 [post_author] => 9491 [post_date] => 2011-08-05 17:14:00 [post_date_gmt] => 2011-08-05 17:14:00 [post_content] =>  The webinar on CPS (chip-package-system) is on Tuesday 9th August at 11am Pacific time. It will be conducted by Christopher Ortiz, Principal Application Engineer at Apache Design Solutions. Dr. Ortiz has been with Apache since 2007, supporting the Sentinel product line. Prior to Apache he worked at Agere / LSI, where he investigated on-chip signal and power integrity challenges for advanced SoC designs. He received his Ph.D. in physics from the University of Notre Dame.

    A complete Chip-Package-System co-design/co-analysis solution addressing system-level power integrity, SSO, thermal, and EMI challenges. Apache’s Sentinel™combines the chip's core switching power delivery network, I/O sub-system, and IC package/PCB modeling and analysis in a single environment for accurate CPS convergence, from early stage prototyping to sign-off.

    To register for the webinar go here.

    More details on the whole series of webinars here.



     [post_title] => Chip-Package-System Webinar [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => chip-package-system-webinar [to_ping] => [pinged] => [post_modified] => 2019-06-14 20:52:49 [post_modified_gmt] => 2019-06-15 01:52:49 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/chip-package-system-webinar.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [8] => WP_Post Object ( [ID] => 674 [post_author] => 9491 [post_date] => 2011-08-05 16:37:00 [post_date_gmt] => 2011-08-05 16:37:00 [post_content] =>  Generally if you want to read about power dissipation in SoCs and the potential impact on limiting how much computer power we might be able to cram onto a given piece of silicon then EE Times is a good place to look. But last weekend there was a full-length article in, of all places a different Times, the New York Times, entitled Progress Hits Snag: Tiny Chips Use Outsize Power.

    The article riffs off apaper at ISCA(link is PDF) titled Dark Silicon and the End of Multicore Scaling. It basically looks at what percentage of transistors will need to powered down at any one time. As early as next year, these advanced chips will need 21 percent of their transistors to go dark at any one time, according to the researchers who wrote the paper.

    This is a big challenge, one that I mused about rather less scientifically just a few weeks ago here on SemiWiki. The challenge with multicore is to work out which parts can be powered down. You can't power down a whole core (at least not all the time, or why bother to have it on the chip) which means a more subtle approach is required.

    The article in the New York Times ends on an optimistic note with a quote from Dave Patterson of Berkeley:
    “It’s one of those ‘If we don’t innovate, we’re all going to die’ papers,” Dr. Patterson said in an e-mail. “I’m pretty sure it means we need to innovate, since we don’t want to die!”



    This reminds me of a quote from Maurice Wilkes, one of the pioneers of digital computing, who was the head of the University of Cambridge Computer Laboratory when I was an undergraduate. When someone argued that computers couldn't get much faster due to speed of light considerations (this was in the days of room-sized computers) Professor Wilkes retorted that "I think it just means computers are going to get a lot smaller." Which, of course, they did.





     [post_title] => IC Power Dissipation in...the New York Times! [post_excerpt] => [post_status] => publish [comment_status] => open [ping_status] => closed [post_password] => [post_name] => ic-power-dissipation-in-the-new-york-times [to_ping] => [pinged] => [post_modified] => 2019-06-14 21:39:34 [post_modified_gmt] => 2019-06-15 02:39:34 [post_content_filtered] => [post_parent] => 0 [guid] => https://www.semiwiki.com/word5/uncategorized/ic-power-dissipation-in-the-new-york-times.html/ [menu_order] => 0 [post_type] => post [post_mime_type] => [comment_count] => 0 [filter] => raw ) [9] => WP_Post Object ( [ID] => 671 [post_author] => 20367 [post_date] => 2011-08-03 19:00:00 [post_date_gmt] => 2011-08-03 19:00:00 [post_content] => ARM's move into the broad Tablet and PC space is based on lining up as many partners as possible to attack Intel from multiple angles. It’s a strategy not so different from what Intel employed in the early PC days. However, the strategy is unraveling as Apple and Samsung have reached market share domination without ARM’s merchant partners. The end game is still playing out as partnerships and alliances continue to form. The long term impact on ARM will be slowing revenue and earnings growth if it plays along the lines that I think.

    But first, as always, an analogy that I think is relevant. 100 years ago, Henry Ford made two critical decisions that allowed him to dominate the auto market in the first 15 years. The first was the assembly line. The second – which I think is more commonly apropos, is the need to go vertical in the manufacturing supply chain building everything in house.

    Back in the 1970s I took a factory tour of the Ford Mustang assembly line and the Steel Rolling Mill that is part of the River Rouge complex - the largest in the world when it was completed. I was more interested in the Mustang tour than the steel tour. However you get a good sense of what Ford could do and how he could sell cars for under $500 which in turn led to industry dominance until he forgot to refresh the Model T in the late 1920s.

    ARM has a history of working with many chip companies to extend the architecture into every crevice. By having multiple suppliers it is able to have the upper hand in the pricing of its license and royalties. With the PC, tablet and phone market they have recruited a who’s who of semiconductor companies: Broadcom, nVidia, Marvell, Qualcomm, TI, Samsung, ST Ericsson, Freescale and others that I am sure I missed. Kind of like the 1927 Yankees Murderers Row lineup to beat Intel.

    The business model in this space though is not going to hold up for one reason. The Tablet and Phone Markets are going Vertical. Apple and Samsung have their own internal developments that will shy away from the merchant market. They now control over 50% of the market in phones and Apple has 90% of the tablet market. Apple and Samsung are going vertical along the whole supply chain with DRAM, Flash, panels, processors etc.. Samsung is true vertical while Apple is a virtual vertical (partially paying ahead on capacity for lower component prices). Apple will especially need to squeeze pennies from every supplier as they face the likelihood of a subsidized Samsung business model.

    If it hasn't happened yet, Apple and Samsung will turn the tables on ARM and demand royalty re-adjustments and create most favored nations status for the two. ARM financial projections will have to come down and their sky high P/E will moderate. Given the market consolidation, I expect many of the above merchant suppliers to throw in the towel by the time of the 22nm generation.

    Now here’s the interesting part. I believe Qualcomm and nVidia will survive and both will fight to win the Amazon, Nokia (and MSFT) and HTC Business – consider this the rest of the non-PC market. Qualcomm has an advantage with its Communications Technology but I am not certain that Snapdragon is meaningful to their overall future. NVidia will get closer to Nokia and MSFT because MSFT needs a hardware platform that combines processor and graphics to undercut Intel long term. Nvidia is rumored to be the lead on the Amazon tablet coming out this fall - which should have fairly good volume.

    After Apple has marginalized or commoditized ARM it will make two more strategic decisions. The first is to enter Intel’s Fab – my guess is at the 14nm node. It could be with ARM but much more likely a multi-core configuration with one core x86 and the other ARM. The reason is that Apple is going to go to a dual O/S configuration on its Tablet and PC platforms in order to improve its customer experience and build on its Wall Gardens protecting the greater ecosystem.

    In the internet and I’ll call it the consumer iCloud mode it will run off of iOS for lower power consumption and longer battery life. In business iCloud mode (running office apps) it will switch to x86 and run in MAC OS in order for the user to experience full performance and App compatibility. Intel’s ultrabook initiative is trying to replicate this – but it won’t feel as slick as Apple’s does and MSFT may try to block the implementation since Intel’s light mode will be based off of the Linux Meego O/S.

    The final piece to Apple’s strategy is to arrange a nice marriage between Qualcomm and Intel for the benefit of just Apple. Apple will demand that Intel run Qualcomm silicon in their fabs to get maximum performance at lowest power and cost. The Qualcomm silicon will be used for iPhones and Tablets in some die-stacking package. Getting CPU and Communications silicon cost down is key to their long term battle with Samsnug. ARM wins in the Tablet and iPhone wars hanging on Apple’s coattails but it is less of a win than if the merchant players were all in the game.

    Intel wins in Tablets and iPhone business through expanded foundry business for Apple that includes building ARM chips for iphone and ARM + x86 combo CPUs for Tablets and MAC Air notebooks. Add on to that the Qualcomm foundry business and it is a significant revenue upside. Qualcomm may have the option of increasing their business with Intel Foundry – for the purpose of selling chips into Samsung, HTC, and Nokia etc… As a long time participant in the mobile PC business, it is the shifting alliances that will be the most fun to watch over the next two years.



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    Don’t get me wrong, I’m a big fan of AMD, I buy AMD based products whenever possible to prevent an innovation stifling Intel monopoly. Unfortunately Silicon Valley coffee house conversations continue to paint a bleak picture for AMD, even with a recent stock surge on better than expected revenue guidance for the rest of 2011. I’m sure Wall Street coffee house conversations do not track with ours and here’s why:

    Intel has always been the semiconductor manufacturing technology leader but throughout the years AMD was very clever and kept pace. Unfortunately AMD went fabless last year and as a result will not be able to compete in the discrete microprocessor market (my opinion). AMD also has no mobile strategy so where will they be when tablets and phones replace laptops?

    Today AMD is in production at 32nm SOI with the Ex AMD fab in Dresden which is very competitive with the current Intel 32nm HKMG process. Future AMD microprocessor generations however will use commercially available foundry processes which track a process node or two BEHIND Intel. You should also know that microprocessor manufacturing is unique and may not 100% adapt to a more generic foundry process.

    Source: TechConnect

    Mid next year AMD will have CPU/GPUs on 28nm HKMG processes but will they be price/performance competitive with the Intel 22nm Tri-Gate technology? The answer is probably NO, not in the discrete microprocessor market. Intel will also be the first to 450mm manufacturing which will bring a dramatic costs savings versus mainstream 300mm semiconductor manufacturing.

    A glaring non-compete example is gross margins. How can AMD again achieve the 50%+ margin average required to compete profitably against Intel? AMD’s gross margins fell below 40% in 2008 and have yet to recover. As an example, take the most recent AMD Wafer Supply Agreement Amendment. A detailed analysis of this agreement is a blog in itself, especially with all of the redacted areas. Skip down to pages 8, 9, and 10 where the financial details are and tell me how AMD will even hit 40% gross margins in 2012. If you disagree let me know in the comment section and we can discuss in more detail.

    To make a long blog short, AMD needs an exit strategy to be competitive with the Intel CPU dynasty. My first choice would be ATIC taking AMD private and integrating it with GlobalFoundries. Second choice would be for Samsung to buy AMD. Either way there would be a viable competitor to Intel. Or not, but it would certainly be fun to watch!

    Don’t get me wrong, I’m not bashing ANYBODY here, I do this blog out of love. The SemiWiki mission statement is “For the greater good of the semiconductor design ecosystem”. I admire ATIC and what they have done for the semiconductor industry, I respect the accomplishments of AMD, and I’m the #1 fan of GlobalFoundries. But let's be honest, Intel is a force to be reckoned with and we had all be better prepared for the coming war of microprocessors!

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  • Samsung to Acquire AMD?

    Samsung to Acquire AMD?
    by Daniel Nenni on 08-07-2011 at 4:00 pm


    Don’t get me wrong, I’m a big fan of AMD, I buy AMD based products whenever possible to prevent an innovation stifling Intel monopoly. Unfortunately Silicon Valley coffee house conversations continue to paint a bleak picture for AMD, even with a recent stock surge on better than expected revenue guidance for the rest of 2011. I’m… Read More


    Sentinel-PSI Webinar

    Sentinel-PSI Webinar
    by Paul McLellan on 08-07-2011 at 3:28 pm

    The last of the current series of webinars is on Sentinel-PSI,IC-Package, Power and Signal Integrity Solution. It will be at 11am Pacific time on Thursday 11th August. It will be conducted by Dr. Tao Su, product manager of the Sentinel products. Dr. Su has many years of experience in the EDA industry and is specialized in power integrity… Read More


    Apple Roadmaps Intel to 14nm

    Apple Roadmaps Intel to 14nm
    by Ed McKernan on 08-07-2011 at 1:11 pm

    Intel will not win the tablet market with any of the various Atom chips rolling out at 32nm, 22nm and even 14nm. They are too late to a game that Apple owns 90% of today and will so in the future. All of these ultra low power atom versions are like the Saturn test rocket developments that preceded the Apollo 11 Moon Landing. They are necessary… Read More


    Yalta in EDA: Cadence stronger in VIP territory…

    Yalta in EDA: Cadence stronger in VIP territory…
    by Eric Esteve on 08-07-2011 at 5:42 am

    …when Synopsys is getting the lion’s share in Interface IP. In Q2 2010, there was two major acquisitions in EDA world: Synopsys has bought Virage Logic (for more than $300M) when Cadence bought Denali for an equivalent amount. Synopsys bought a 100% IP focused company, when Cadence bought a strongly VIP focused company. Does it … Read More


    August 11th – Hands-on Workshop with Calibre: DRC, LVS, DFM, xRC, ERC

    August 11th – Hands-on Workshop with Calibre: DRC, LVS, DFM, xRC, ERC
    by Daniel Payne on 08-06-2011 at 9:29 pm

    I’ve blogged about the Calibre family of IC design tools before:

    Smart Fill replaced Dummy Fill Approach in a DFM Flow
    DRC Wiki
    Graphical DRC vs Text-based DRC
    Getting Real time Calibre DRC Results with Custom IC Editing
    Transistor-level Electrical Rule Checking
    Who Needs a 3D Field Solver for IC Design?
    Prevention is BetterRead More


    SNUG outside Silicon Valley

    SNUG outside Silicon Valley
    by Paul McLellan on 08-05-2011 at 6:04 pm

    SNUG in Silicon Valley was in March so either you were there or you’ve missed it. But it is the summer (and fall) of SNUG in the rest of the world:

    SNUG China (in Beijing, Shanghai, Shenzhen) on August 22nd-30th
    SNUG Singapore on August 23rd
    SNUG Taiwan (in Hsinchu) on August 25-26th
    SNUG Japan (in Tokyo) on September 7th
    SNUG … Read More


    Assertion-based Formal Verification

    Assertion-based Formal Verification
    by Paul McLellan on 08-05-2011 at 5:34 pm

    Formal verification has grown in importance as designs have grown and it has become necessary to face up to the theoretical impossibility of using simulation to get complete coverage along with the practical impossibility of simulating enough to even get close.

    There are a number of solvers for what is called satisfiability (SAT)… Read More


    Chip-Package-System Webinar

    Chip-Package-System Webinar
    by Paul McLellan on 08-05-2011 at 5:14 pm

    The webinar on CPS (chip-package-system) is on Tuesday 9th August at 11am Pacific time. It will be conducted by Christopher Ortiz, Principal Application Engineer at Apache Design Solutions. Dr. Ortiz has been with Apache since 2007, supporting the Sentinel product line. Prior to Apache he worked at Agere / LSI, where he investigated… Read More


    IC Power Dissipation in…the New York Times!

    IC Power Dissipation in…the New York Times!
    by Paul McLellan on 08-05-2011 at 4:37 pm

    Generally if you want to read about power dissipation in SoCs and the potential impact on limiting how much computer power we might be able to cram onto a given piece of silicon then EE Times is a good place to look. But last weekend there was a full-length article in, of all places a different Times, the New York Times, entitled ProgressRead More


    Apple Strength Will Compel ARM to Trim its Sails

    Apple Strength Will Compel ARM to Trim its Sails
    by Ed McKernan on 08-03-2011 at 7:00 pm

    ARM’s move into the broad Tablet and PC space is based on lining up as many partners as possible to attack Intel from multiple angles. It’s a strategy not so different from what Intel employed in the early PC days. However, the strategy is unraveling as Apple and Samsung have reached market share domination without ARM’s merchant… Read More