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Bring Water to those in the World that need it

Bring Water to those in the World that need it
by Luke Miller on 08-03-2014 at 3:00 pm

Dear Reader, I need your help with something.

Invention is the Mother of necessity. When I bought the Miller Farm, it came with a very shallow well. What that meant is priming the pump, alot. Me being an engineer weighed the options. The wife, with 5 kids to bath, wash clothes, cook, etc.. was a bit overwhelmed. Of course the worst day… Read More


Open Source Verilog

Open Source Verilog
by Paul McLellan on 08-03-2014 at 8:01 am

Over the years there have been various open source EDA projects but none that has realized a full industrial strength design tool that has broad adoption and is strong enough to compete with similar products from the EDA industry.

Open source is clearly a great way to develop software. Lots of people can see all the source code and … Read More


Enabling Higher Level Design Automation with Smart Tools

Enabling Higher Level Design Automation with Smart Tools
by Pawan Fangaria on 08-02-2014 at 10:00 pm

Although design houses have always strived for optimizing best design flows according to their design needs by customizing the flows using effective and efficient internal as well as external tools, this need has further grown in the context of design scenarios getting wider and wider from transistor, gate and RTL to system level.… Read More


FDSOI Target Applications Are…

FDSOI Target Applications Are…
by Eric Esteve on 08-01-2014 at 12:05 pm

Not PC segment, not necessarily Application Processor for Mobile, despite the power efficiency advantage versus a bulk technology. After several weeks filled by very animated and controversial discussion about FD-SOI cost, thanks to Semiwiki bloggers and readers, it seems interesting to elevate the debate and try to figure… Read More


eSilicon and the Ten Minute Quote

eSilicon and the Ten Minute Quote
by Paul McLellan on 08-01-2014 at 8:01 am

One of the challenges in bringing a design into production is getting a quote that includes all the various stages of the process. The quote cycle typically takes a couple of weeks. It is also pretty wasteful. A typical design might be quoted by 3 manufacturers and so 2 out of 3 quotes are wasted expense because the design is lost to a … Read More


It’s not a fiction, it’s about to turn into reality

It’s not a fiction, it’s about to turn into reality
by Pawan Fangaria on 08-01-2014 at 2:00 am

Often I used to wonder why a search engine company would invest so heavily and indulge into stuff like smartphones, home automation devices, servers and many other exotic, innovative things they are doing internally and externally. But when I connect the dots, I find that this company in on certain massive missions which, if accomplished… Read More


How to Beat a New Entrant with Superior EDA tool

How to Beat a New Entrant with Superior EDA tool
by barun on 07-31-2014 at 8:00 pm

How to handle a new entrant with superior product quality is a point of worried to all EDA companies. Due to continuous research happenings and relatively lower investment requirement new and new EDA start-ups are coming in EDA domains regularly. In several situations, these start-ups offer product of superior quality in terms… Read More


IO Design Optimization Flow for Reliability in 28nm

IO Design Optimization Flow for Reliability in 28nm
by Daniel Payne on 07-31-2014 at 5:00 pm

User group meetings are a rich source of information for IC designers because they have actual designers talking about how they used EDA tools in their methodology to achieve a goal. Engineers at STMicroelectronicspresented at a MunEDAUser Group on the topic: I/O Design Optimization Flow For Reliability In Advanced CMOS Nodes.… Read More


Making IP Reuse and SoC Integration Easier

Making IP Reuse and SoC Integration Easier
by Daniel Payne on 07-31-2014 at 2:00 pm

The last graphics chip that I worked on at Intel was functionally simulated with only a tiny display size of 16×16 pixels, because that size allowed a complete regression test to be simulated overnight. Our team designed three major IP blocks: Display Processor, Graphics Processor and Bus Interface Unit. We wanted to also… Read More