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Peak probability at zero distance actually makes no sense
In lithography, it is often stated that the best resolution that can be achieved depends on wavelength and numerical aperture (NA), but this actually only applies to the so-called “aerial” image. When the image is actually formed in the resist layer, it also depends on an… Read More
While Cadence and Synopsys were sharing a lot of detail over the past few years about what they were doing in AI, Siemens EDA seemed content to offer a very general picture about their intentions without getting into a lot of detail. At DVCon 2025 they finally pulled back the curtain. Why wait until now to announce?
Darron May (Director… Read More
Dinesh Bettadapur serves as the Chief Executive Officer of Irresistible Materials Ltd. Dinesh has over 20 years of executive management experience in the semiconductor industries and has held significant leadership roles encompassing general management, P&L management, sales, business development, strategic alliances,… Read More
Because of its open and modular nature, RISC-V has faced recognizable security challenges stemming from fragmentation, performance inefficiencies, and inherent vulnerabilities. Fragmentation across implementations leads to inconsistencies, making it difficult to enforce uniform security measures. Performance… Read More
Tell us a little bit about yourself and your company.
I am the CEO of Finwave Semiconductor and joined the company in June 2023. I have close to 40 years of experience in the semiconductor industry, and I have worked in France, Japan and the United States. I have been in Silicon Valley for the last 27 years. After 14 years at Philips … Read More
As usual I check in on Accellera activities each year at DVCon. Lu Dai (chair) gave an opening talk at the Accellera lunch, with contributions from other speakers on a few topics. In the afternoon I heard an update on PSS 3.0. What follows is a quick summary with my own musings on behavioral coverage.
Karsten … Read More
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Custom and analog/mixed-signal IC designs have some unique IP and symmetry checking requirements for physical design. Waiting until the end of the IC layout process to verify IP instances for correctness or proper symmetry will cause project delays, so an approach to perform earlier physical verification makes more sense. … Read More
Dan is joined by Rick Bye, director of product management and marketing at Arteris with responsibility for the FlexNoC family of non-coherent Network-on-Chip IP products. Rick joined Arteris from Arm where he was a senior product manager in the Client Line of Business, responsible for a demonstration SoC and compression IP. … Read More
The tech world is sprinting toward a future where your fridge orders groceries, your car avoids traffic before you hit it, and security cameras don’t just watch—they understand. But behind these innovations lies a messy truth: building the brains for these smart systems is complicated.
Fresh off the 2024 Arm Tech Symposia… Read More
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Elon Musk Given CHIPS Act & AI Oversight – Mulls Relocation of Taiwanese Fabs