Most of us will remember the productivity boost that hierarchical analysis provided vs. analyzing a chip flat. This “divide and conquer” approach has worked well for all kinds of designs for many years. But, as technology advances tend to do, the bar is moving again. The new challenges are rooted in the iterative nature of high complexity… Read More
Siemens EDA Illuminates the Complexity of PCB DesignAs heterogeneous multi-die design becomes more prevalent, the…Read More
Accelerating Advanced FPGA-Based SoC Prototyping With S2CHaving spent a significant amount of my career…Read More
Verification Futures with Bronco AI Agents for DV DebugVerification has become the dominant bottleneck in modern…Read More
There is more to prototyping than just FPGA: See how S2C accelerates SoC Bring-Up with high productivity toolchain?System-on-Chip designs continue to grow in scale and…Read MoreTalking Sense With Moortec … Ask Yourself a “Probing” Question?
Managing and controlling thermal conditions in-chip is nothing new and embedded temperature monitoring has been going on for many years. What is changing however, is the granularity and accuracy of the sensing now available to SoC design teams. Thermal activity can be quite destructive and if not sufficiently monitored can … Read More
Using AI to Locate a Fault. Innovation in Verification
After we detect a bug, can we use AI to locate the fault, or at least get close? Paul Cunningham (GM of Verification at Cadence), Jim Hogan and I continue our series on novel research ideas, through a paper in software verification we find equally relevant to hardware. Feel free to comment.
The Innovation
This month’s pick is… Read More
Novel DFT Approach for Automotive Vision SoCs
You may have seen a recent announcement from Mentor, a Siemens business, regarding the use of their Tessent DFT software by Ambarella for automotive applications. The announcement is a good example of how Mentor works with their customers to assure design success. On the surface the announcement comes across as a nice block and… Read More
A tour of Cliosoft’s participation at DAC 2020 with Simon Rance
As chip complexity grows, so does the need for a well-thought-out design data management strategy. This is a hot area, and Cliosoft is in the middle of it. When I was at eSilicon, we used Cliosoft technology to manage the design and layout of high-performance analog designs across widely separated design teams. The tool worked… Read More
A Look at the Die of the 8086 Processor
The Intel 8086 microprocessor was introduced 42 years ago last month,1 so I made some high-res die photos of the chip to celebrate. The 8086 is one of the most influential chips ever created; it started the x86 architecture that still dominates desktop and server computing today. By looking at the chip’s silicon, we can see… Read More
Ansys Multiphysics Platform Tackles Power Management ICs
Ansys addresses complex Multiphysics simulation and analysis tasks, from device to chip to package and system. When I was at eSilicon we did a lot of work on 2.5D packaging and I can tell you tools from Ansys were a critical enabler to get the chip, package and system to all work correctly.
Ansys recently published an Application Brief… Read More
Hierarchical CDC analysis is possible, with the right tools
Back in my Atrenta days (before mid-2015), we were already running into a lot of very large SoC-level designs – a billion gates or more. At those sizes, full-chip verification of any kind becomes extremely challenging. Memory demand and run-times explode, and verification costs explode also since these runs require access to … Read More
SystemC Methodology for Virtual Prototype at DVCon USA
DVCon was the first EDA conference in our industry impacted by the pandemic and travel restrictions in March of this year, and the organizers did a superb job of adjusting the schedule. I was able to review a DVCon tutorial called “Defining a SystemC Methodology for your Company“, given by Swaminathan Ramachandran… Read More
Menta CEO Update 2020
What products are Menta offering today?
Menta is a semiconductor IP provider. We are the only proven European provider of programmable logic to be embedded inside customers’ SoCs and ASICs. This programmable logic is in the form of embedded FPGA IP. So, we offer our customers the possibility to have a small portion of their SoC as… Read More



AI Bubble?