Synopsys IP Designs Edge AI 800x100

Short vs Long Term Covid19 Impact

Short vs Long Term Covid19 Impact
by Robert Maire on 04-19-2020 at 10:00 am

Covid Semiconductor

-Short term Covid19 impact is primarily logistics related
-Longer term impact is more systemic/demand driven
-Impact will wind through supply chain over several qtrs
-Other issues, such as trade, remain an overhang

Short term versus long term in the semiconductor industry
The stocks declines over the last months seem to indicate… Read More


Wave Computing and MIPS Wave Goodbye

Wave Computing and MIPS Wave Goodbye
by Mike Gianfagna on 04-19-2020 at 8:00 am

Screen Shot 2020 04 17 at 7.42.27 PM

Word on the virtual street is that Wave Computing is closing down. The company has reportedly let all employees go and will file for Chapter 11. As one of the many promising new companies in the field of AI, Wave Computing was founded in 2008 with the mission “to revolutionize deep learning with real-time AI solutions that scale from… Read More


TSMC COVID-19 and Double Digit Growth in 2020

TSMC COVID-19 and Double Digit Growth in 2020
by Daniel Nenni on 04-17-2020 at 10:00 am

Mark Liu CC Wei TSMC


TSMC has had an incredible run since its founding in 1987 which spans most of my 36 year semiconductor career. Even in these troubled times TSMC is a shining bellwether with double digit growth expectations while the semiconductor industry will be flat or slightly down. Let’s take a close look at the TSMC Q1 2020 conference call and… Read More


Lithography Resolution Limits – Arrayed Features

Lithography Resolution Limits – Arrayed Features
by Fred Chen on 04-17-2020 at 6:00 am

Lithography Resolution Limits Arrayed Features

State-of-the-art chips will always include some portions which are memory arrays, which also happen to be the densest portions of the chip. Arrayed features are the main targets for lithography evaluation, as the feature pitch is well-defined, and is directly linked to the cost scaling (more features per wafer) from generation… Read More


Cadence – Defining a Roadmap to the Future

Cadence – Defining a Roadmap to the Future
by Mike Gianfagna on 04-16-2020 at 10:00 am

Screen Shot 2020 04 08 at 7.46.46 PM

Cadence recently published a position paper that details a set of enabling technologies that will be needed for product design going forward. Entitled Intelligent System Design, the piece describes the changing landscape of system design and the requirements for success. Cadence has built a branded approach to address these… Read More


Breker Tips a Hat to Formal Graphs in PSS Security Verification

Breker Tips a Hat to Formal Graphs in PSS Security Verification
by Bernard Murphy on 04-16-2020 at 6:00 am

Breker security tables

It might seem paradoxical that simulation (or equivalent dynamic methods) might be one of the best ways to run security checks. Checking security is a problem where you need to find rare corners that a hacker might exploit. In dynamic verification, no matter how much we test we know we’re not going to cover all corners, so how can it… Read More


The Story of Ultra-WideBand – Part 5: Low power is gold

The Story of Ultra-WideBand – Part 5: Low power is gold
by Frederic Nabki & Dominic Deslandes on 04-15-2020 at 10:00 am

Wide Band Series SemiWiki

How can ultra-wideband done right do more with less energy

In the previous part, we discussed how the time-frequency duality can be used to reduce the latency. When you compress in time a wireless transmission, you reduce the time it takes to hop from a transmitter to a receiver. Another very interesting capability enabled by the… Read More


Artificial Intelligence in Micro-Watts: How to Make TinyML a Reality

Artificial Intelligence in Micro-Watts: How to Make TinyML a Reality
by Mike Gianfagna on 04-15-2020 at 6:00 am

Eta Compute ECM3532

TinyML is kind of a whimsical term. It turns out to be a label for a very serious and large segment of AI and machine learning – the deployment of machine learning on actual end user devices (the extreme edge) at very low power. There’s even an industry group focused on the topic. I had the opportunity to preview a compelling webinar about… Read More


Project-Centric Design Process, or IP-centric

Project-Centric Design Process, or IP-centric
by Daniel Payne on 04-14-2020 at 10:00 am

projects

How do most IC design teams organize their work during the design process?

Most design teams would say that they organize their work into a project-centric view, and that at the beginning of the process use a tool for requirements management, maybe a bug tracker, or some design management tool. On the four IC designs that I worked … Read More


Innovation in Verification April 2020

Innovation in Verification April 2020
by Bernard Murphy on 04-14-2020 at 6:00 am

Innovation

This blog is the next in a series in which Paul Cunningham (GM of the Verification Group at Cadence), Jim Hogan and I pick a paper on a novel idea we appreciated and suggest opportunities to further build on that idea.

We’re getting a lot of hits on these blogs but would like really like to get feedback also.

The Innovation

Our next pick… Read More