Design for test (DFT) requires a lot of up-front planning that can be difficult to alter if testing needs or performance differ from initial expectations. Hierarchical methodologies help in many ways including making it easier to reduce on chip resources such as the number of test signals. Also, hierarchical test allows for speed-ups… Read More
FPGA Prototyping in Practice: Addressing Peripheral Connectivity ChallengesModern chip design verification often encounters challenges when…Read More
An Insight into Building Quantum ComputersGiven my physics background I’m ashamed to admit…Read More
I Have Seen the Future with ChipAgents Autonomous Root Cause AnalysisI have seen a lot of EDA tool…Read More
Arm FCSA and the Journey to Standardizing Open Chiplet-Based DesignI have written before about an inter-chiplet communication…Read MoreAgile and DevOps for Hardware. Keynotes at DVCon Europe
Paul Cunningham (Verification CVP/GM at Cadence) initiated our monthly Innovation in Verification blog to hunt for novel ideas in verification, breaking past the usual steady, necessary but undramatic pace of incremental advances. I attended a couple of sessions from DVCon Europe recently, and was encouraged to hear a couple… Read More
SiFive Expands RISC-V Technology and its Ecosystem at the Fall Linley Processor Conference
As the Linley Fall Processor Conference winds down, there are certain presenting companies that left a lasting impression. SiFive is one of those companies. On October 21, SiFive introduced the newest member of the SiFive Intelligence family of processor coresSiFive Intelligence family of processor cores, based on… Read More
Prototyping with the Latest and Greatest Xilinx FPGAs
I was reading the S2C press release announcing their new FPGA prototyping platform based on the Xilinx UltraScale+ VU19P FPGA, and how the new FPGA will accelerate billion gate FPGA prototyping, and I was struck by the stunning implications of this announcement. Not that billion gate SoC designs can now be prototyped with FPGAs,… Read More
Aldec Adds Simulation Acceleration for Microchip FPGAs
Despite the fact that FPGA based systems make it easy to add ‘hardware in the loop’ for verification, the benefits of HDL and gate level simulation are critical for finding and eliminating issues and bugs. The problem is that software simulators can require enormous amounts of time to run full simulations over sufficient time intervals… Read More
WEBINAR: Differentiated Edge AI with OpenFive and CEVA
OpenFive is hosting a webinar with CEVA on November 12th to talk about how OpenFive’s vision platform, leveraging CEVA vision and AI solutions. Which can get you to a differentiated solution for your product with as much or as little silicon participation on your part as you want. I talked briefly to Jeff VanWashenova (CEVA Sr. Dir… Read More
Post Election Fallout-Let the Chips Fall / Rise Where They May
- Changing US administration likely positive for chips & tech
- Stepping back from the brink of a potential ugly trade war
- Likely increased Covid/tech spend- War with Big Tech is over
- Tech & Chips had a lot riding on the elections outcome
As compared to previous presidential elections, this one likely has much more impact on… Read More
Achronix is Driving the Fourth FPGA Wave
Technology typically evolves in waves. Sometimes it’s referred to as a “revolution” or an “age”. The industrial revolution and the information age are examples. These kinds of categorizations help to clarify the impact of innovation in ways that are relevant to everyone – you can’t look away if the world is changing around you.… Read More
Embedded Systems Development Flow
Earlier this year. as part of my coverage of the virtual Design Automation Conference (DAC), I interviewed Agnisys CEO and founder Anupam Bakshi. He talked about the new products they introduced at the show and filled me in on the history of the company and his own background. Recently, Anupam presented the webinar “System Development… Read More
The Future of FPGAs
On June 1, 2015 Intel and Altera announced , that they had entered into a definitive agreement under which Intel would acquire Altera for $16.7 billions. That was a major milestone for the FPGA community as Xilinx and Altera were the main FPGA vendors.
After the official announcement of AMD to acquire Xilinx, there is a huge… Read More



An Insight into Building Quantum Computers