By Bhanu Pandey
The semiconductor industry is currently facing a significant challenge in functional verification. According to the most recent Wilson Research Group / Siemens EDA Functional Verification Study, first-silicon success rates have hit a historic low, with nearly 68% of designs requiring two or more spins. While… Read More
Semiconductor designers today face a critical hurdle: how to smoothly transition from an open-source hardware blueprint to a commercially hardened, production-ready silicon implementation. As semiconductors play an increasingly essential role in powering the AI era, safeguarding these hardware foundations has become… Read More
Access to advanced semiconductor technology involves much more than choosing a process node. Design teams also need computing capacity, compatible tools, secure technology access, and experienced support. IC-Link by imec’s expanded collaboration with TSMC addresses that combination, potentially making sophisticated… Read More
Siemens has again sponsored a Wilson-led survey on the state of (functional) verification in the industry, and this time Harry Foster (Chief Scientist, Verification at Siemens) has condensed his major takeaways from the report. These are intriguing – particularly an apparent revolutionary change in first-silicon trends.… Read More
Daniel is joined by Julie Rogers, Executive Director, ESD Alliance. Julie brings deep expertise in industry collaboration, technical conferences, and executive engagement. She brings more than 30 years of experience driving growth, visibility, and alignment across complex, highly technical markets. She is widely recognized… Read More
One of the standout presentations at the 2026 TSMC OIP Forum highlighted a collaboration between Siemens EDA, Marvell, and TSMC. I always appreciate EDA presentations that bring together customer and foundry perspectives, and this one did not disappoint. We follow 3D IC technology closely and have published more than 150 blogs… Read More
How VSORA rebalances memory and compute for AI inference in the data center and at the edge
For more than a decade, the AI hardware industry focused mainly on model training, while inference represented a smaller share of overall demand. That balance is changing as trained models are deployed widely in recommendation engines, … Read More
LUBIS EDA is introducing FormalOS, a platform designed to make formal verification more systematic, scalable and predictable. Built on the company’s five-stage methodology, it combines structured workflows, verification playbooks, automation, reusable verification assets and sign-off evidence within customers’ existing… Read More
Daniel is joined by John Bruggeman, Chief Marketing Officer at Vinci, where he leads the company’s market narrative and strategic positioning. His work focuses on translating complex technical advances into clear category definition, industry relevance, and market adoption.
Daniel discusses How Vinci fits into the hardware… Read More
At DAC 2026 I had the opportunity to speak with Juan Rey, CTO Siemens EDA about the Calibre product used for IC physical verification, circuit verification, 3D IC and DFM optimization. Juan has been involved with Calibre since 2001, served on the Board of Directors of Silicon Integration Initiative (SI2), on the Executive Technology… Read More
Intel Foundry: AI performance now depends on the whole system