A recent educational virtual event with the above title was jointly sponsored by Synopsys and Global Foundries. The objective was to bring awareness to state-of-the-art mixed-signal design practices for automotive circuits. The 2-day event comprised of lectures delivered by engineering professors and doctoral students… Read More
TSMC’s 2026 AZ Exclusive Experience Day: Bridging Careers and Semiconductor InnovationIn February of 2026, Taiwan Semiconductor Manufacturing Company…Read More
DAC – The Chips to Systems Conference 2026The Design Automation Chips to Systems Conference is…Read More
Taming Advanced Node Clock Network Challenges: JitterClock jitter rarely fails in obvious ways. In…Read More
Synopsys and AMD Honored for Generative and Agentic AI Vision, Leadership, and ImpactSynopsys and AMD were recently selected by the…Read More
The Foundry Model Is Morphing — AgainWhen Morris Chang left Texas Instruments in 1983 to found TSMC, he was…Read MoreSISPAD – Cost Simulations to Enable PPAC Aware Technology Development
I was invited to give a plenary address at the SISPAD conference in September 2021. For anyone not familiar with SISPAD it is a premiere TCAD conference. This year for the first time SISPAD wanted to address cost and my talk was “Cost Simulations to Enable PPAC Aware Technology Development”.
For many years the standard in technology… Read More
Losing Lithography: How the US Invented, then lost, a Critical Chipmaking Process
Lithography is arguably the most important step in semiconductor manufacturing. Today’s state-of-the-art EUV scanners are incredibly complex machines that cost as much as a new Boeing jetliner.
From humble beginnings in 1984 as a joint venture with Philips, ASML has grown to become the world’s second largest chip equipment… Read More
Intel – “Super” Moore’s Law Time warp-“TSMC inside” GPU & Global Flounders IPO
“Super” Moore’s Law- 5 nodes in 4 years- Too good to be true?
Gelsinger said “Intel will be advantaged with High NA EUV”
Ponte Vecchio better with “TSMC Inside”
Global Flounders IPO as price drops on public debut
Lets do the time warp again….(apologies to Riff Raff)
Its just … Read More
Podcast EP45: Designer, IP and Embedded Tracks at DAC
Dan and Mike are joined by Ambar Sarkar, the chair of the designer, IP and embedded tracks at DAC this year. Ambar talks about the breadth of these programs, including what topics are hot, along with some exciting new formats for presentation and interaction this year.
The views, thoughts, and opinions expressed… Read More
CEO Interview: Dr. Ashish Darbari of Axiomise
Dr. Ashish Darbari is the founder & CEO of Axiomise. As founder & CEO of Axiomise, he has led the company to successfully deploy the unique combination of training, consulting, services, and verification IP to a range of customers. Dr. Darbari has expertise in all aspects of formal methods including theorem proving, property… Read More
Semiconductor CapEx too strong?
Semiconductor capital expenditures (CapEx) are on track for strong growth in 2021. For many companies the increase should continue into 2022. TSMC, the dominant foundry company, expects to spend $30 billion in CapEx in 2021, a 74% increase from 2020. TSMC announced in March it plans to invest $100 billion over the next three years,… Read More
Optical I/O Solutions for Next-Generation Computing Systems
According to DARPA the fraction of total power consumed in semiconductors for I/O purposes as been growing rapidly and is creating an I/O power bottleneck. It has reached the point where it needs to be addressed with new technologies and approaches. Interestingly, while the energy density, as measured by pJ/bit for short reach… Read More
Memory Consistency Checks at RTL. Innovation in Verification
Multicore systems working with shared memory must support a well-defined model for consistency of thread accesses to that memory. There are multiple possible consistency models. Can a design team run memory consistency checks at RTL? Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur,… Read More
Intel- Analysts/Investor flub shows disconnect on Intel, Industry & challenges
Analysts missed all warning signs until Intel spelled it out
12% stock drop shows disconnect and misunderstanding
No quick fix, this is a long term, uncertain problem & solution
Everyone ignored the obvious until it ran them over
A 12% stock drop is fault of investors/analysts not Intel
Whenever a stock drops 12% in one day there… Read More


The Risk of Not Optimizing Clock Power