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ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era

ISS 2021 – Scotten W. Jones – Logic Leadership in the PPAC era
by Scotten Jones on 01-15-2021 at 6:00 am

Slide3

I was asked to give a talk at the 2021 ISS conference and the following is a write up of the talk.

The title of the talk is “Logic Leadership in the PPAC era”.

The talk is broken up into three main sections:

  1. Background information explaining PPAC and Standard Cells.
  2. A node-by-node comparisons of companies running leading edge logic
Read More

IEDM 2020 – Imec Plenary talk

IEDM 2020 – Imec Plenary talk
by Scotten Jones on 01-08-2021 at 6:00 am

Imec Figure 1

On Monday morning at IEDM, Sri Samavedam of Imec opened the technical program with a plenary talk entitled “Future Logic Scaling: Towards Atomic Channels and Deconstructed Chips”. I am not generally a fan of plenary talks, I think the presenters often try to cover too much in their talks and end up not providing enough detail to be… Read More


No Intel and Samsung are not passing TSMC

No Intel and Samsung are not passing TSMC
by Scotten Jones on 12-02-2020 at 6:00 am

Slide1

Seeking Alpha just published an article about Intel and Samsung passing TSMC for process leadership. The Intel part seems to be a theme with them, they have talked in the past about how Intel does bigger density improvements with each generation than the foundries but forget that the foundries are doing 5 nodes in the time it takes… Read More


Leading Edge Foundry Wafer Prices

Leading Edge Foundry Wafer Prices
by Scotten Jones on 11-06-2020 at 6:00 am

Slide1

I have seen several articles recently discussing foundry wafer selling prices for leading edge wafers, these articles all quote estimates from a paper by the Center for Security and Emerging Technology (CSET). The paper is available here.

My company IC Knowledge LLC is the world leader in cost and price modeling of semiconductors… Read More


VLSI Symposium 2020 – Imec Monolithic CFET

VLSI Symposium 2020 – Imec Monolithic CFET
by Scotten Jones on 09-13-2020 at 10:00 am

th311591894514842 Page 04

The 2020 VLSI Technology Symposium was held as a virtual conference from June 14th through June 19th. At the symposium Imec gave an interesting paper on Monolithic CFET and I had a chance to interview one of the authors, Hiroaki Arimura.

It is well known in the industry that FinFETs (FF) are reaching the end of their scaling life. Samsung… Read More


SEMICON West – Applied Materials Selective Gap Fill Announcement

SEMICON West – Applied Materials Selective Gap Fill Announcement
by Scotten Jones on 08-17-2020 at 5:00 pm

Applied Materials Selective Gapfill July 2020 Page 02

At SEMICON West, Applied Materials announced a new selective gap fill tool to address the growing resistance issues in interconnect at small dimensions. I had the opportunity to discuss this new tool and the applications for it with Zhebo Chen global product manager in the Metal Deposition Products group at Applied Materials.… Read More


Imec Technology Forum and ASML

Imec Technology Forum and ASML
by Scotten Jones on 07-30-2020 at 6:00 am

itf usa 2020 martin van den brink Page 15

On Thursday July 9 Imec held a virtual technology forum. Imec is one of the premier research organizations working on semiconductor technology and their forums are always interesting. My area of interest is process technology and the following are my observation in that area from the forum.

Luc Van Den Hove
Luc Van Den Hove is the… Read More


VLSI Symposium 2020 – Imec Buried Power Rail

VLSI Symposium 2020 – Imec Buried Power Rail
by Scotten Jones on 07-26-2020 at 10:00 am

thl61591895083576 Page 04

The 2020 VLSI Technology Symposium was held as a virtual conference from June 14th through June 19th. At the symposium Imec gave an interesting paper on Buried Power Rails (BPR) and I had a chance to interview one of the authors, Anshul Gupta.

As logic devices continue to scale down metal pitch is reaching a limit. Imec defines a pitch… Read More


Key Semiconductor Conferences go Virtual

Key Semiconductor Conferences go Virtual
by Scotten Jones on 06-24-2020 at 2:00 pm

IEDM 2020 Logo

This last week the 2020 Symposia on VLSI Technology and Circuits (VLSI Conference) was held as a virtual conference for the first time and it was announced today (June 24th) that this year’s IEDM conference will also be held as a virtual conference.

“The IEDM Executive Committee has decided that in the interest of prioritizing the… Read More


Effect of Design on Transistor Density

Effect of Design on Transistor Density
by Scotten Jones on 05-26-2020 at 10:00 am

TSMC N7 Density Analysis SemiWiki

I have written a lot of articles looking at leading edge processes and comparing the process density. One comment I often get are that the process density numbers I present do not correlate with the actual transistor density on released products. A lot of people want to draw conclusions an Intel’s processes versus TSMC’s processes… Read More