Clearly unfazed by the collapse of the proposed merger with Nvidia, Arm just announced products in support of, what else, mobile gaming. Nvidia turf. Of course Nvidia’s gaming strength is in tethered platforms or laptops. However, understand that 50% of video gaming revenue in 2020 came from smartphone games and that growth is… Read More




New Mixed-Signal Simulation Features from Siemens EDA at DAC
It’s the second day of DAC, and the announcements are coming in at a fast pace, so stay tuned to SemiWiki for all of the latest details. As a long-time SPICE user and industry follower, I’ve witnessed the progression as EDA vendors have connected their SPICE simulators to digital simulators, opening up a bigger world… Read More
Silicon Catalyst Angels Turns Three – The Remarkable Backstory of This Semiconductor Focused Investment Group
The Silicon Catalyst Angels investment group recently announced the completion of three years of operation. There are great statistics associated with the organization and its financial results. This includes an over 4X increase in members since inception and an impressive list of investments. One of the noteworthy attributes… Read More
3D Device Technology Development
The VLSI Symposium on Technology and Circuits provides a deep dive on recent technical advances, as well as a view into the research efforts that will be transitioning to production in the near future. In a short course presentation at the Symposium, Marko Radosavljevic, from the Components Research group at Intel, provided … Read More
What’s New With Calibre at DAC This Year?
When I worked at EDA vendors and attended DAC, one of the most popular questions asked in the booth and suites was simply, “What’s new this year?” It’s a fair question, and yet many semiconductor professionals are so focused on their present project, using their familiar methodology, that they simply… Read More
Intelligently Optimizing Constrained Random
“Who guards the guardians?” This is a question from Roman times which occurred to me as relevant to this topic. We use constrained random to get better coverage in simulation. But what ensures that our constrained random testbenches are not wanting, maybe over constrained or deficient in other ways? If we are improving with a faulty… Read More
Memory Security Relies on Ultra High-Performance AES-XTS Encryption/Decryption
A recent SemiWiki post covered the topic of protecting high-speed interfaces in data centers using security IP. That post was based on a presentation made by Dana Neustadter at IP-Soc Silicon Valley 2022 conference. Dana’s talk was an overview of various interfaces and Synopsys’ security IP for protecting those interfaces. … Read More
Can We Auto-Generate Complete RTL, SVA, UVM Testbench, C/C++ Driver Code, and Documentation for Entire IP Blocks?
Whether it is fully autonomous driving, or wrinkle-free fabric, or ambient energy harvesting for powering electronic devices, each industry is chasing after its respective ultimate goal. For the semiconductor design industry, its goal is the capability to generate complete chip or IP in executable format from a high-level… Read More
Interface IP in 2021: $1.3B, 22% growth and $3B in 2026
If you want to remember the key points for Interface IP in 2021, just consider $1.3B, 22%, $3B. Interface IP category has generated $1 billion 300 million in 2021, or 22.7% year to year growth, thanks to high runner protocols PCIe, DDR memory controller and Ethernet/SerDes. Even more impressive is the forecast, as IPnest predict… Read More
ASML- US Seeks to Halt DUV China Sales
-If you can’t beat them, embargo them
-It has been reported US wants ASML to halt China DUV tools
-US obviously wants to kill, not just wound China chip biz
-Is this embargo the alternative to failed CHIPS act?
-Hard to say “do as I say, not as I do”- but US does anyway
First EUV ban now DUV ban? Are process & yield… Read More
Intel’s Pearl Harbor Moment