What XiangShan Got Right—And What It Didn’t Dare TryAn Open ISA, a Closed Mindset — Predictive…Read More
The Critical Role of Pre-Silicon Security Verification with Secure-IC’s Laboryzr™ PlatformAs embedded systems and System-on-Chip (SoC) designs grow…Read More
Agentic AI and the EDA Revolution: Why Data Mobility, Security, and Availability Matter More Than EverThe EDA (Electronic Design Automation) and semiconductor industries…Read More
Electronic Design Automation (EDA) is a critical industry which enables the development of electronic systems. Traditionally, EDA has been bifurcated into two distinctive market segments: Semiconductor and Systems (PCB). If one were to look at the EDA industry in the early 1970’s, one would find significant capabilities… Read More
-KLA great quarter & guide as backlog mutes China/Economy
-Patterning starts to catch up to wafer inspection outperform
-China impact is limited to leading edge & specific customers
-Cuts in memory capex less impactful on KLA
Revenues were $2.7B with EPS of $7.06 versus street… Read More
Dan is joined by Dr. Walden Rhines, former CEO of Mentor Graphics, which is now Siemens EDA, and current CEO of Cornami. Wally is also the Executive Sponsor of the SEMI Electronic Design Market Data Report, which is the topic of this podcast.
The current market report for Q2, 2022 documents continued strong performance, with some… Read More
This was the 12th TSMC OIP and it did not disappoint. The attendance was back to pre pandemic levels, there was interesting news and great presentations. We will cover the presentations in more depth after the virtual event which is on November 10th. You can register HERE.
As I mentioned in my previous post, the Jim Keller Keynote … Read More
-Lam reports good quarter that is high water mark for cycle
-2023 WFE to be down more than 20%- Cuts spending & Hiring
-If we back out deferred rev outlook would be down for Dec
-Memory already Down & China down $2-$2.5B in 2023
Lam reported revenues of … Read More
Machine learning (ML) is finding its way into many of the tools in silicon design flows, to shorten run times and improve the quality of results. Logic simulation seemed an obvious target for ML, though resisted apparent benefits for a while. I suspect this was because we all assumed the obvious application should be to use ML to refine… Read More
When I first heard the term ‘bespoke silicon,’ I had to get my dictionary out. Well versed in the silicon domain, I did not know what bespoke meant. It turns out to be a rather old-fashioned term for tailor made and seems to be very much British English. The word dates from 1583 and is the past participle of bespeak, according… Read More
Dan is joined by Dr. Giovanni De Micheli, a research scientist in electronics and computer science credited with inventing the network-on-chip (NoC) design automation paradigm and creating EDA algorithms and design tools. Before serving as Professor and Director of the Integrated Systems Laboratory at EPFL, he was Professor… Read More
Many multi-thread consistency problems emerge only in post-silicon testing. Maybe we should take advantage of that fact. Paul Cunningham (Senior VP/GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always,… Read More
3GPP Release 17 and 802.11be (Wi-Fi 7) extend modulation complexity, raising the bar for conformance testing and test instrumentation to new levels. The latest release of Keysight PathWave 89600 Vector Signal Analysis 2023 (VSA 2023) software takes on higher-order QAM and smarter workflows, many customer-requested, for … Read More
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A Quick Tour Through Prompt Engineering as it Might Apply to Debug