Responsible for the design and development of analog/mixed signal IC circuit blocks from initial concept and specification through final verification and conformance to customer requirements. Candidate’s background should demonstrate good problem solving skills, excellent analog aptitude, good communication skills, and ability to work cooperatively in a team environment. Must have demonstrated experience in Analog IP designs including some of the following circuit blocks: System level modeling by matlab, C, or Verilog A; Driver; Receiver; Focus on high speed IO/ESD To provide front & back end models for IO design.
Bachelor degree with 5+ years of applicable experience, Master degree with 3+ years of experience in electrical engineering, microelectronics. Ability to work effectively alone or as well as in a team. Essential that the individual demonstrates strong communication, verbal and written Requires good communication skills in English. Industry Experience for High Speed IO mass products. Familiar with Power & Signal Integrity and understanding of signal switching, noise & design issues. Familiar with I/O design methodology & flow, Calibration, JTAG design requirements, understanding of analog circuitry
Knowledge of EDS/High speed IO design areas and their architectures/applications: Solid understanding of IC design technology and process/methodology in IC design solutions Familiar with Cadence analog and mixed-signal EDA tools is a plus Familiarity with package/board constraints is a plus Self-motivated, able to work as a team player, excellent verbal and written communication skills in English.
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