Cameras are becoming ubiquitous thanks to a new wave of applications that span GoPro for sports, smart glass for the Internet eyewear, ADAS for car safety, and more. However, while these cameras boast an increasing amount of megapixels to enhance the quality of vision, what they increasingly need is more processing power to analyze what they see.
That’s because these smart cameras are meant to collect a lot of data and perform complex analysis tasks related to motion detection, object detection, gesture recognition, augmented reality, etc. The solution to the processing needs that come with using advanced software algorithms, according to CEVA Inc., is offloading the device’s main CPU and GPU for processing tasks tied to performance-intensive imaging and computer vision applications.
CEVA is showcasing its MM3101 computer vision and image processing platform at the Mobile World Congress (MWC) in Barcelona next week. The CEVA-MM3101 processor core can be used in system-on-chip (SoC) platforms to offload application processors in mobile devices, wearable electronics, connected cars, surveillance applications and home entertainment systems.
CEVA managers claim that the MM3101 platform is ideally suited for the extreme computational needs in sophisticated computer vision applications for its ability to offload the performance-intensive imaging tasks from the CPUs and GPUs to the DSP. That, in turn, dramatically reduces the power consumption of the overall system, a key value proposition in embedded vision functions like gesture recognition, emotion detection and augmented reality.
An outline of applications supported by CEVA-MM3101
The MM3101 IP platform accelerates imaging and vision applications through software libraries, software tools and ability to offload the CPU through a dedicated framework. CEVA also allows algorithm developers to leverage the MM3101’s programmable architecture to implement their own proprietary software, so they can address unique use cases and differentiate their products.
Android Use Case
According to CEVA, its MM3101 image processor can be easily integrated into an SoC by using the simple interface between the host CPU and the CEVA-MM3101. Here, it presents the Android Multimedia Framework (AMF) as a use case. The AMF feature—which allows Android programmers to access a CEVA DSP core through the application processor on an Android device—can simplify the implementation of vision and imaging apps on Android devices.
The AMF feature allows SoC designers to leverage the performance of the vector DSP directly from the Android environment, offloading the CPU and abstracting any programming and system complexities for software developers. CEVA claims that, while implementing MM3101 image processing core on an Android device, the use of AMF will consume a fraction of power required to run these tasks on a CPU. And that MM3101 can reduce the power consumption by a factor of 50x.
CEVA also presents facial recognition expert nViso as a testament; leveraging the AMF abstraction layers, nViso was able to port its emotion detection algorithms onto the CEVA-MM3101 platform within a week. The CEVA-MM3101 platform has enabled an emotion detection application for nViso that uses 3D facial imaging technology to interpret human emotions and reactions to stimuli. It does this by tracking hundreds of micro-expressions and face movements to gain a more accurate and real-time understanding of the user’s emotions.
CEVA Android Multimedia Framework
CEVA’s Application Developer Kit (ADK) combines a library of computer vision algorithms with a framework for connecting to the DSP platform through the CPU. That lets application developers write C programs on the CPU that call functions on the DSP. The library contains algorithms needed in the vision applications like gesture recognition, facial tracking, and object detection.
Anatomy of Image Processor
In the CEVA-MM3101 computer vision and computational photography platform, the driving force is the vector processing (VP) engine, which performs filtering and the vector-type operations required for pixel processing. It’s based on a dedicated pixel-processing VLIW/SIMD architecture with 10-stage pipeline and contains seven different units that can work in parallel to enable flexible combination for different types of instructions.
The programmable engine can handle 32-byte operations in a single cycle and contains special instructions that can be configured to create proprietary filters for video and imaging processing. Another key feature is the decrease in data bandwidth transfer from the DDR to the core and vice versa. Here, CEVA uses unique patents for data folding and processing on-the-fly to enhance internal memory structure.
CEVA-MM3101 image processor architecture
The vector processing engine can handle large amounts of data for burst-mode image pipeline requirements as well as HD video encoding and decoding without hurting the overall performance. Moreover, it offers optimized kernels for pre- and post-image processing to ensure that CEVA customers, partners and third-party developers can conveniently develop their own apps.
At the MWC in Barcelona next week, CEVA will showcase the updates on its MM3101 image processing platform, as well as the latest versions of its CEVA-TeakLite-4 for smartphones, CEVA-XC4500 catering to LTE wireless infrastructure applications and CEVA-Bluetooth. The company will demonstrate the latest developments in its DSP cores and IP connectivity platforms at the stand 6A50 in Hall 6.
A brief profile of CEVA- MM3101 image processing platform can be seen here.
Image credit: CEVA Inc.
Majeed Ahmad is author of books Age of Mobile Data: The Wireless Journey To All Data 4G Networksand Essential 4G Guide: Learn 4G Wireless In One Day.Share this post via: