CCS Vs NLDM Library delay model

[sabarinathan]

Hi all,

I have been thinking over this question since long time but not able to figure out exactly.

1. We need to have exact delay model for std cells at lower technology but how do we achieve it?

130nm library (NLDM - say 5% variation with SPICE simulation) characterisation.
130nm library (CCS - say 3% variation with SPCIE simulation) characterisation.

Above mentiond 5% and 3 % variations are based on layout PEX isn't?
if so how does CCS library modeling reduces percentage of variation compare to NLDM?

i can understand CCS is based driver and receiver(load) current model but not able to get a hold on this.

2. Is SPICE simulation being done by same way for 130nm and 40nm or any difference in SPCIE simulation for both?

 

[Daniel Payne]

SPICE circuit simulation is always the most accurate way to simulate timing, current or power. With SPICE the only question is, "How close to silicon measurements is it?"

Both NLDM and CCS are modeling techniques that abstract the driver/receiver model at a higher level than SPICE, hence they calculate much faster, saving you time. Many engineers want to trade off run-time of a simulation versus accuracy.

FYI - here's a white paper on the Composite Current Source (CCS) model: http://www.opensourceliberty.org/ccspaper/ccs_timing_wp.pdf

 

[paripath]

More in depth comparison of CCS and NLDM models is here Comparing NLDM And CCS delay models - Paripath - Complete Characterization Platform.

 

[Daniel Payne]

Thanks for the library delay model comparison, and all the best in growing your company, Paripath.