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Cannon to compete with ASML? A two horse race?

Arthur Hanson

Well-known member

Any thoughts on this and its impact on the semi world would be appreciated.
 
Product site: https://global.canon/en/product/indtech/semicon/fpa1200nz2c.html

Canon's NIL technology enables patterning with a minimum linewidth of 14 nm, equivalent to the 5-nm-node required to produce most advanced logic semiconductors which are currently available. Furthermore, with further improvement of mask technology, NIL is expected to enable circuit patterning with a minimum linewidth of 10 nm, which corresponds to 2-nm-node.

Nanoimprint is already widely known for use outside semiconductors, but this is the first time it is taking on ASML. It would be interesting to see whether any EUV user tries it out, at least kick the tires. Defects and overlay need to be checked thoroughly. The resist (dispensed by the machine?) and mask also need to be introduced properly. It might eliminate multipatterning at the wafer, but likely would require multipatterning for the mask-making.

Kioxia has had some involvement, and there were reports (rumors?) that SK Hynix also wanted to get in on it.
 
Product site: https://global.canon/en/product/indtech/semicon/fpa1200nz2c.html

Canon's NIL technology enables patterning with a minimum linewidth of 14 nm, equivalent to the 5-nm-node required to produce most advanced logic semiconductors which are currently available. Furthermore, with further improvement of mask technology, NIL is expected to enable circuit patterning with a minimum linewidth of 10 nm, which corresponds to 2-nm-node.

Nanoimprint is already widely known for use outside semiconductors, but this is the first time it is taking on ASML. It would be interesting to see whether any EUV user tries it out, at least kick the tires. Defects and overlay need to be checked thoroughly. The resist (dispensed by the machine?) and mask also need to be introduced properly. It might eliminate multipatterning at the wafer, but likely would require multipatterning for the mask-making.

Kioxia has had some involvement, and there were reports (rumors?) that SK Hynix also wanted to get in on it.
I feel like NAND sounds like the most likely place given the large pitches involved. Considering that potential customer list, my hunch sounds about right. Given how long and expensive it is to make masks, and how the NIL masks sound even more difficult to make than UV or soft X-ray litho masks I am skeptical it will be easier or more cost effective than conventional litho techniques for DRAM or logic. But hey if cannon pulled it off I wouldn't be complaining.
 
I am a bit surprised by the mask specifications. It should only allow one field size but here it looks like can fit 16 fields? That would really speed up the throughput. But defects, overlay, mask-making time would be harder.
 
That article appears to be a year old, since it refers to 2023 as the future.

The main consumers of nanoimprint appear to be optics, making the "turning grating" and other metasurfaces in optics for augmented reality and other applications. It works well for that since overlay is not an issue and occasional defects are invisible.

In semis the applications would seem to be limited by overlay and dimensional stability, so you would be looking for applications where a single critical mask makes sense. Flat panel displays, including those for phones and headsets. Maybe some level of NAND or DRAM. But I saw Canon at conference earlier this year and it still seems to be in the future for semis.
 
how the NIL masks sound even more difficult to make than UV or soft X-ray litho masks I am skeptical it will be easier or more cost effective than conventional litho techniques
The NIL masks are generally second generation stamps off an inverse master. The NIL masks range from single-use 300mm masks up to multiple use (thousands of imprints) for step and repeat reticle masks (which are the kind Canon works on).

The single use ones are generally designed to be dissolved, not lift off. The multiple use ones obviously have to lift off, which is possibly the most interesting part of the tech.
 
Aaah, the long and missing promise of imprint. When I started in the semiconductor industry 20.5 years ago, it was pitched to us as the up and coming new technology to replace everything, or at least be an adequate alternative to what was done back then. Which was 90nm. Is anybody actually using this anywhere near a technology node below, say, 20nm?

Plus, if you count technology outside of EUV, Nikon is already competing, and has for a long time, so it's really a 3-way race - with Canon coming back in after they exiting when 193nm came out.
 
Is anybody actually using this anywhere near a technology node below, say, 20nm?
Canon's papers were indicating NAND would be first targeted application, then DRAM, finally logic. The NAND timing was mentioned here as 2025 https://semiengineering.com/nanoimprint-finds-its-footing-in-photonics/ :

Canon Nanotechnologies is betting big on 3D NAND flash for its NIL manufacturing technology. The company currently has test equipment in place at SK Hynix and in Kioxia’s (formerly Toshiba) fabrication facility and plans to begin mass producing 3D NAND flash using NIL by 2025.
 
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