What's your definition of low volume?That would be a question for ifs folks. I would assume they aren’t picky since they do packaging for Graviton 3. And my understanding is that the hyperscaler custom silicon stuff is low volume (for now).
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What's your definition of low volume?That would be a question for ifs folks. I would assume they aren’t picky since they do packaging for Graviton 3. And my understanding is that the hyperscaler custom silicon stuff is low volume (for now).
I don’t have a number for you. But my understanding was at least right now they are installing more Epycs and Xeons than AWS silicon. I have no doubt that over the years this ratio will flip.What's your definition of low volume?
On the fourth-quarter earnings call for Taiwan Semiconductor Manufacturing Co., a securities analyst asked management why the costs of building a new computer chip fabrication plant in Arizona seemed to be so much higher than back home in Taiwan.
Taiwan Semiconductor CFO Wendell Huang responded, according to a CQ-Roll Call transcript:
Let me share with you this. The Arizona fab. We make the decision based on customers’ request... We’re not able to share with you a specific cost gap number between Taiwan and U.S., but we can share with you that the major reason for the cost gap is the construction cost of building and facilities, which can be 4 to 5x greater for U.S. fab versus a fab in Taiwan.The high cost of construction includes labor cost, cost of permits, cost of occupational safety and health regulations, inflationary costs in recent years and people and learning curve costs. Therefore, the initial costs of overseas fabs are higher than our fabs in Taiwan.
Remember that something like 80% of the cost of a fab is equipment. I’m certain construction costs more in the U.S although government incentives and “value capture” pricing as TSMC puts it can make up the difference. If I’m off here please correct me.A small article from today's Wall Street Journal. An opinion piece, actually, but the interesting part is a quote from TSMC's CFO. I'm sure you'll need a subscription, so I'll quote it:
4 to 5x the US cost? That's difficult to believe, assuming the facilities are really comparable. And if the resulting chips are sold at the market price, meaning the customers don't care where they come from and won't pay a premium based on country of origin, it calls into question whether TSMC can maintain anything like their current net margins if TSMC is correct. And it calls into question Intel's IFS strategy if most of the production is US-based.
Yeah I don't buy 4-5x. Maybe because TSMC is inexperienced with US operations and needs to develop talent and equation channels here. Whereas someone like intel, TI, or Micron already know the regulatory processes, already has partnerships with universities/community colleges/the DOD to nab retiring veterans, as well as knowing how to be EPA compliant. Maybe that number is also artificially inflated by assuming incentives from the ROC or PRC and no incentives from the US GOV. Even if the shells costs are WAAAAAAY cheaper in the ROC tools will still dominate fab costs, and tool vendors don't care where you are located the price is the price.A small article from today's Wall Street Journal. An opinion piece, actually, but the interesting part is a quote from TSMC's CFO. I'm sure you'll need a subscription, so I'll quote it:
4 to 5x the US cost? That's difficult to believe, assuming the facilities are really comparable. And if the resulting chips are sold at the market price, meaning the customers don't care where they come from and won't pay a premium based on country of origin, it calls into question whether TSMC can maintain anything like their current net margins if TSMC is correct. And it calls into question Intel's IFS strategy if most of the production is US-based.
Fab construction is as far from my expertise as art history is. Obviously from my post, I'm skeptical too. But this is the CFO of TSMC talking. An NYSE-listed company subject to US SEC rules. All I can say is .Remember that something like 80% of the cost of a fab is equipment. I’m certain construction costs more in the U.S although government incentives and “value capture” pricing as TSMC puts it can make up the difference. If I’m off here please correct me.
I remember sitting in an all-hands meeting in Intel, CEO Paul Otellini was presenting, talking about the original construction of Fab D1X. (D1X has since received a $3B expansion.) I don't remember when the all-hands took place, but it probably in the first half of 2011. He mentioned that Intel was spending at least $1B more by building the fab in the US rather than Asia. The cost of the Fab at that time was projected to be about $6-8B. I remember him saying that it was the world's most expensive building at the time, with construction requiring the world's largest moveable crane. Let's assume that Otellini's numbers are close to accurate, so in 2011 the fab would have cost $5B in Asia rather than $6B, that was 20% more for US construction. 20% sounds low to me. I would easily believe 50% today. But 4x or 5x? I may not be an expert, but 4-5x seems unbelievable.Yeah I don't buy 4-5x. Maybe because TSMC is inexperienced with US operations and needs to develop talent and equation channels here. Whereas someone like intel, TI, or Micron already know the regulatory processes, already has partnerships with universities/community colleges/the DOD to nab retiring veterans, as well as knowing how to be EPA compliant. Maybe that number is also artificially inflated by assuming incentives from the ROC or PRC and no incentives from the US GOV. Even if the shells costs are WAAAAAAY cheaper in the ROC tools will still dominate fab costs, and tool vendors don't care where you are located the price is the price.
Public decision making also doesn't support TSMC's statement here either. If that was the case why didn't intel outsource all of their fabs to Asia, and why didn't TSMC outsource to SE Asia (SE Asia is far cheaper than the ROC)? Intel already moved most of their packaging to Asia for cost, so if it really was 4-5x they would have moved their fabs as well. In 2017 why would Samsung build a sizeable 14nm expansion in Texas without federal incentives (their third fab at that site)? Why does Micron continue to expand the Boise site instead of just moving R&D to Asia?
To me this claim stinks.
Yeah I doubt he is literally lieing, however that doesn’t mean that his assumptions he used to arrive at his numbers were reasonable or generally applicable to other firms, and as we saw from the statement itself he has omitted tool cost. Lieing no. Misleading probably yes. Alas this is the world of business.Fab construction is as far from my expertise as art history is. Obviously from my post, I'm skeptical too. But this is the CFO of TSMC talking. An NYSE-listed company subject to US SEC rules. All I can say is .
This is 100% true, except I would put the gap at 10x rather than 5. It is meaningfully efficient for TSMC AZ megaproject to have reduced the gap to 5x.A small article from today's Wall Street Journal. An opinion piece, actually, but the interesting part is a quote from TSMC's CFO. I'm sure you'll need a subscription, so I'll quote it:
4 to 5x the US cost? That's difficult to believe, assuming the facilities are really comparable. And if the resulting chips are sold at the market price, meaning the customers don't care where they come from and won't pay a premium based on country of origin, it calls into question whether TSMC can maintain anything like their current net margins if TSMC is correct. And it calls into question Intel's IFS strategy if most of the production is US-based.
So a fab which takes two years to complete and $10B to complete in Taiwan takes 20 years and $100B in the US? (Just making up some numbers.) Why doesn't reality seem to track this? I have no doubt there are portions of the construction which are indeed 10x in time and cost, or perhaps more, because the US does have silly permitting and regulation requirements, but for the entire project? Following your claims, Intel, GF, Micron, TI, and Samsung would be working more slowly than they are. And they'd never do it again.This is 100% true, except I would put the gap at 10x rather than 5. It is meaningfully efficient for TSMC AZ megaproject to have reduced the gap to 5x.
As a gross simplification, I would say a fab consists of concrete, steel and PFA tubing. The part I’m familiar with is the PFA, which you could think of as the “blood circulation” of the fab. It takes 2 weeks (10 business days) and $100K USD to build a unit of this massive circulation, a chemical or slurry loop, in Taiwan. In the US, it is $1M and 100 business days. In other words, 10x in cost, 10x in time. Time is a cost escalator, and trades ”manage” their workload to make more money. There is also red tape, SL1 and SL2 gating inspections with local plumbing code fulfilled by inspectors which slows this work down.
And some of it is on engineers, with inexperience and attention to detail creating reworks. Project execution is a hard job in a fab full of easier jobs, so it doesn’t get the best support or lead to great career paths, so there is no innovation, and perhaps there can’t be because of the regulations.
A small article from today's Wall Street Journal. An opinion piece, actually, but the interesting part is a quote from TSMC's CFO. I'm sure you'll need a subscription, so I'll quote it:
4 to 5x the US cost? That's difficult to believe, assuming the facilities are really comparable. And if the resulting chips are sold at the market price, meaning the customers don't care where they come from and won't pay a premium based on country of origin, it calls into question whether TSMC can maintain anything like their current net margins if TSMC is correct. And it calls into question Intel's IFS strategy if most of the production is US-based.
Now that is a number I can believe! Seems to line up with the structurally similar high performance chems or catalysts industries. Low staff, high capital cost, having to worry about strict environmental laws, and your input material costs often being much lower than equipment/processing costs. Depending on your exact locale chemical plant construction doesn't often vary by more than like 20-30% (unless you are a crazy person who is trying to build in California in which case it would actually cost like 5-10x).And when it is all said and done TSMC will have 2x the N4/3 wafer output in Taiwan versus the US? And the wafer cost of the AZ fabs will be 7%higher?
I do hope you are aware that for these fabs staffing is a very tiny percent of the wafer cost, and that once fabs are depreciated (aka when they start printing money) that cost to build the shell becomes irrelevant. Most of intel's fabs have long since depreciated. All that needs to be done is either roll in some new tools for new IFS nodes, or add an expansion that is only stuffed with the new tools. Meanwhile things like i16 or the upper backend can still be done by the older fabs at that site. Ohio and Germany present their own problems, but at the very least they aren't insurmountable. They are being built in the lowest cost parts of their respective countries in areas that have a long history of manufacturing excellence and a plethora of excellent engineering schools nearby. More expensive than the ROC? Sure. But by the same metric the ROC is more expensive than the PRC or Malaysia. You go where you can source the talent.utilize their fabs across high income to medium income countries
I have no doubt TSMC is charging significantly more from customers that want to use its Arizona plant.Now that is a number I can believe! Seems to line up with the structurally similar high performance chems or catalysts industries. Low staff, high capital cost, having to worry about strict environmental laws, and your input material costs often being much lower than equipment/processing costs. Depending on your exact locale chemical plant construction doesn't often vary by more than like 20-30% (unless you are a crazy person who is trying to build in California in which case it would actually cost like 5-10x).
It does seem like Intel's IFS strategy requires that they be willing to accept substantially lower gross and net margins than TSMC does. I don't know for sure, but based on snippets of information that Intel has released, they also seem to be counting on internal efficiencies for their own chip development and manufacturing businesses, by developing an efficient foundry model, which will bolster their profits. I think I mentioned before that I believe a chiplet strategy for CPUs will yield dramatic efficiency results by reducing the number of all-layer steppings the development teams need, improving the time to market, once they get higher on the initial chiplet learning curve, and their own fab processes improve. Intel's gross margins on internally fabricated CPUs, like for example the ones for Chromebooks, are very impressive. It doesn't take a financial genius to see that a more efficient Intel overall could cover for IFS margins much lower than TSMC's.1. TSMC's customers who intentionally choose to use the Arizona fabs to manufacture their chips will be very possible to pay higher price. TSMC has indicated before that they won't use a single worldwide pricing that ignore the fab's location.
2. From US, Israel, Ireland, to Germany, IFS' strategy to operate all new and old fabs at high income/high cost locations is indeed questionable.
While TSMC, Samsung, UMC ( probably not including Globalfoundries) can use strategies to utilize their fabs across high income to medium income countries, Intel can only manufacture chips in high income/high cost countries. Intel's options may be limited.
Yeah I don't buy 4-5x. Maybe because TSMC is inexperienced with US operations and needs to develop talent and equation channels here. Whereas someone like intel, TI, or Micron already know the regulatory processes, already has partnerships with universities/community colleges/the DOD to nab retiring veterans, as well as knowing how to be EPA compliant. Maybe that number is also artificially inflated by assuming incentives from the ROC or PRC and no incentives from the US GOV. Even if the shells costs are WAAAAAAY cheaper in the ROC tools will still dominate fab costs, and tool vendors don't care where you are located the price is the price.
Public decision making also doesn't support TSMC's statement here either. If that was the case why didn't intel outsource all of their fabs to Asia, and why didn't TSMC outsource to SE Asia (SE Asia is far cheaper than the ROC)? Intel already moved most of their packaging to Asia for cost, so if it really was 4-5x they would have moved their fabs as well. In 2017 why would Samsung build a sizeable 14nm expansion in Texas without federal incentives (their third fab at that site)? Why does Micron continue to expand the Boise site instead of just moving R&D to Asia?
To me this claim stinks.
Interesting thoughts... Care to elaborate on the Chromebook bit? I can't imagine that a Pentium or Celeron is selling for much more than a last gen mediaTek chip. Even if we are talking 14nm where intel's structural cost isn't completely out the window, I can't imagine that the intel cpu is cheaper to make. My gut still says TSMC or Samsung 10nm is cheaper for the ARM guys after you cut away the foundry's margins. If you have evidence to the contrary I would love to hear it though.It does seem like Intel's IFS strategy requires that they be willing to accept substantially lower gross and net margins than TSMC does. I don't know for sure, but based on snippets of information that Intel has released, they also seem to be counting on internal efficiencies for their own chip development and manufacturing businesses, by developing an efficient foundry model, which will bolster their profits. I think I mentioned before that I believe a chiplet strategy for CPUs will yield dramatic efficiency results by reducing the number of all-layer steppings the development teams need, improving the time to market, once they get higher on the initial chiplet learning curve, and their own fab processes improve. Intel's gross margins on internally fabricated CPUs, like for example the ones for Chromebooks, are very impressive. It doesn't take a financial genius to see that a more efficient Intel overall could cover for IFS margins much lower than TSMC's.