Formal Verification – DVClub Europe Meeting

Online

Formal Verification Formal Verification can help you find bugs earlier in the design cycle and accelerate root cause analysis. But success with Formal requires the effective selection and implementation of the right formal technologies and methods. In this DVClub meeting our speakers will share their experiences adopting Formal Verification and then open the floor for …

Verisium SimAI: Coverage Gaps Meet Their Match

Online

Every project has some areas that seem impossible to cover. Various factors can cause these nearly impossible-to-hit coverage gaps, including technical complexity, lack of resources, and shifting requirements. In constrained random environments, simply running more random seeds may not always address these coverage gaps effectively. Overcoming these gaps requires creativity, persistence, and technical expertise. A …

Webinar: Signal Integrity for Embedded Computing Applications by Matthew Burns

Online

Embedded computing developers face new design challenges implementing high-speed protocols like 100 GbE, USB4, PCIe 5.0, DDR4/5, and more. This webinar introduces fundamental signal integrity concepts like insertion loss, return loss, and crosstalk, and relates them to a case study of the connector design for the COM-HPC Module Base Specification Revision 1.2 featuring the new …

Webinar: Improving Semiconductor Wafer Fabrication Process Efficiencies Using Ansys Solutions

Online

Ansys Semiconductor Manufacturing Webinar Series: Part 1 of 3. Join us on Thursday, April 25th for an in-depth view of multiphysics simulation in the semiconductor fabrication process. Learn more about the webinar series! TIME: THURSDAY, APRIL 25TH 11 AM EASTERN TIME Venue: Virtual Overview Accurate design and optimization of the semiconductor fabrication process/equipment for yield improvements …