A Scalable Approach to 2X Faster Turnaround Time for Arm Neoverse N2 Core Design Verification

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Wednesday, November 17, 2021 | 10:30-11:30 a.m. PST In the latest generation of multiple processor SoCs, designers are adding cache-coherent agents beyond the multi-processor clusters, making it a complex verification challenge. System coherency needs to be maintained at various levels, beginning at the cluster level, and continuing, across the cache coherent interconnect and across chips …