Formal Verification – DVClub Europe Meeting

Online

Formal Verification Formal Verification can help you find bugs earlier in the design cycle and accelerate root cause analysis. But success with Formal requires the effective selection and implementation of the right formal technologies and methods. In this DVClub meeting our speakers will share their experiences adopting Formal Verification and then open the floor for …

Webinar: Design, Simulate, and Validate Your Circuit with PSpice

Online

DATE: Wednesday, April 24 TIME: 8:00am PDT | 11:00am EDT | 4:00pm BST |  8:30pm IST PSpice is a high-performance, industry-proven, mixed-signal simulator and waveform viewer for analog and mixed-signal circuits. As one of the most widely used mixed-mode circuit simulators with extensively available models from component and IC vendors, PSpice simulation technology is applicable for product design in …

Masterclass: Deploying Solido Design Environment AI Workflows on AWS

Online

Utilizing AWS cloud resources to accelerate variation-aware verification   AI-powered Solido Design Environment provides SPICE-accurate variation-aware verification for 3, 4, 5, 6 and higher sigma targets, orders of magnitude faster than traditional brute-force methods. With cloud computing made more accessible than before, many teams are considering running design and verification workloads, including Solido Design Environment, on …