HardTech is Canada’s premiere hardware technology-focused conference, featuring prominent thought leaders in the tech ecosystem that are creating transformative experiences for those around the world. Hosted by ventureLAB in partnership with the Regional Municipality of York, our mission is to emphasize the importance of hardware technology and the impact it has on our globe, while …
See an up-to-date speaker and session list: https://www.potomacinstitute.org/events/education Apply online: https://docs.google.com/forms/d/e/1FAIpQLSe9-x4EOavTiqdUJ_xv7Fe-7siZmTUDnWFBtsyY9KF3juW5eg/viewform From semiconductor shortages to malign microchip actors to overseas dependencies, we face a host of challenging obstacles for this vital industry. How have we gotten here? Where are we going? Why do we need reform now? Find the answers to all this and more in …
Continue reading "Microelectronics: Foundations and Futures Executive Course"
This online workshop covers common gotchas and roadblocks engineers face when implementing FPGA designs and bringing up PCBs for the first time. Learn best practices for debugging challenging issues encountered while developing FPGAs, SoCs, PCBs, and embedded systems using the Xilinx® Vivado® Design Suite, including techniques for triggering on boot and hardware-software co-debugging. Special topics …
Continue reading "Advanced Debugging Workshop for Hardware Engineers"
This 4-hour online workshop by BLT Training provides engineers with experience using the Vitis™ Model Composer tool for MATLAB Simulink model-based designs, specifically focusing on the Versal AI Engines. Learn how to create a model-based design, and create, simulate and debug a complex system with the AIE library blocks. The workshop includes live demos.
Join 2 panelists from the AMD Xilinx Factory and our expert, Glenn, to explore the new IDE. This webinar will discuss the latest updates to Vitis in the new release 2023.1.
Mastering Vivado Timing Constraints: Strategies for FPGA Performance Workshop (Sponsored by AMD Xilinx) Description Do you struggle to identify which constraints are needed for a design or how to properly input them? This workshop will cover how to make use of the features provided by Vivado, clock domain crossing strategies, and how to get the …
Demystifying Clock Domain Crossings (CDC) and Synchronization Circuits Webinar Description This one-hour webinar will discuss all of the basics of what clock domain crossings (CDCs) are and how you can navigate them safely. We will discuss how to do single bit CDCs, several methods for CDC busses, and also the Xilinx Parameterized Macros (XPM) for …
Continue reading "WEBINAR: Demystifying Clock Domain Crossings (CDC) and Synchronization Circuits"
