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Panel: Strategies for Next Generation Semiconductor IP Management

Panel: Strategies for Next Generation Semiconductor IP Management
by Holly Stump on 05-16-2014 at 7:00 am

I just returned from the “Semiconductor Executive Briefing: Strategies for Next Generation Semiconductor IP Management” panel,held at the Computer History Museum, sponsored by Dassault Systèmes.

(Left to right) Moderator: Warren Savage, President and CEO, IPextreme, with panelists John Tam, Director of Business Development, IP Group, Cadence; Bernard Murphy, Ph.D., CTO, Atrenta; Michael McNamara, CEO, Adapt-IP; Joe Dury, Director, Kalypso.

Warren: What are the key issues around IP today?

  • Yes,we have unparalled access to IP today, but still….how it is packaged, quality,documentation, and management is still a challenge!
  • Mac: Back in the day, we knew IP was a Good Thing, but we had no idea! IP is not like LEGOS, click and fit! It is complex, and different developers (digital,analog, software) each have their own concerns. Stitching it all together is a challenge; low power requirements and short product lifecycles complicate it even more.
  • John: The market is huge; Cadence and Synopsys alone do over $500M. That is a value proof point.
  • Joe and Bernard agreed: understanding all use cases is important, some of the finger pointing stems from the lack of this.

Metrics: how are we doing, and how can we tell?

  • Joe: Percent of re-use is one metric, but hard to measure, especially with derivatives.
  • Mac: Think…there used to be 5 or 6 cell phone chipsets, now only 1 or 2: this is a measure of IP success! Even though it reduces need for EEs and EDA tools…Be careful what you wish for! (Laughter)

IP decision-making: make or buy, and preserving differentiation…

  • Bernard: It’s a tough decision; external IP is attractive to reduce time, and risk, or if you lack expertise. But you need to ask yourself, what is my differentiation? Hardware? Software? Price? Channel? Some other corporate strength? And if you back away from internal IP development, expect an impact on EE staff…
  • John: Yes, it is hard to bound the problem; need to know what you are optimizing, and also over sales volumes.
  • Few companies have the luxury of custom development, fruit not withstanding. How can they differentiate? Red cell phones vs blue?
  • Mac: Even the (legal) term IP connotes something malleable, almost intangible…Most IP is built around standards, overarching decision factors are around differentiation and time to market.

Fingerpointing When Things Go Very Wrong…

  • John: Problem is, everyone wants to tweak IP and use it in a different (off-label)way, not as specified, for differentiation.
  • Bernard: Yes, when you take a standard, like AMBA, and use it in a non-standard way, like extensions, this may create problems.
  • Joe: It is back to the use case; we are still evolving our concepts of IP.
  • Mac: “You mean you cannot do 100% test coverage???” Laughing…the question of a naïve user… I am a strong believer in SystemC modeling. Also, as IP moves to a higher and higher level, larger blocks, more of the burden is removed from the user. Large IP blocks, not small, so you don’t need 80-200 IP blocks to stitch together. So consolidation is good in this sense: you only have 7 engineers to choke, not 80!
  • Joe: Remember the early days? “Real Men Have Fabs.” (Author note: I was there, a woman, designing chips at HP and I had 3 fabs! Grin…) Now, fabless is the model, we all profit. It is analogous.
  • Mac: To date, verification (in all its forms) has given IP a real boost, flushing out stitching problems, although it is not an easy problem or panacea.
  • Bernard: Recently at DVCon, still found SoC verification is like the Wild Wild West…lots of methodologies. Often the goal is to compress the hardware verification stage and run real software ASAP.
  • John: You can never have enough verification…but how much do you need? It comes to what you can afford in terms of time- tools-methods.

Warren: Do 3-D ICs present new IP challenges?

  • Yes, yield, revenue sharing, licensing implications are more complex. Manufacturing efficiencies will drive this: whether to combine analog and digital, how to treat MEMS.

Warren: What about IP protection?

  • Bernard: Protection is not only about the IP vendor; it is bidirectional. Think aboutprotection for users from their IP, for example leaks and security issues.
  • Mac: I organized an IP Track at DAC, please join me to explore this more… IP vendors need to trust their customers, we only have legal protection and one cannot from a practical perspective encrypt (too many downstream tools.)
  • John: If someone wants to steal IP, they generally can, be careful. And, as IP ages, it becomes more of a commodity.
  • Mac: Yes, just come up with the next Big Thing in IP!
  • Joe: Locks keep honest people out.
  • Bernard: Some technologies for protection can be designed into chips, but they are largely analog and don’t help with soft IP. However, this area is evolving…
  • John: This issue tends to favor customers buying IP from larger companies, where they have completed the long contract negotiations, the indemnity clauses, recourse.etc.

My key takeaways:

  • Celebrate the evolution of IP!
  • Know what your differentiationis!
  • And remember…bigger IP blocks mean less risk, and fewer necks to choke!

(Author caveat: This is paraphrased, from memory, any errors are All My Fault, not Theirs. Just cut me off,without an IP core!)

Bonus: photo of the Babbage Difference Engine at the fabulous Computer History Museum:

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