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IBIS-AMI Back-Channel System Optimization in Practice

IBIS-AMI Back-Channel System Optimization in Practice
by Mike Gianfagna on 02-18-2020 at 6:00 am

I recently spent some time at DesignCon 2020 in Santa Clara. For those who haven’t attended this show in a while, you need to go. It’s no longer a small event focused on chip design. It has grown into a true system-level conference, with a broad ecosystem represented on the show floor and in the technical sessions. Ecosystem is an important concept regarding DesignCon.  Many of the technical papers present a collaboration between two or more companies to achieve a particular system design goal.

The first presentation I attended at the show fit this model quite well, with Cadence Design Systems and Marvell Semiconductor presenting a joint modeling and optimization project. The session started at 8:00 AM and the room was almost full – a good indicator of interest in the topic.

Let’s start by unpacking the title of the presentation. IBIS (I/O Buffer Information Specification) is a standard to describe IC input/output analog characteristics. The Algorithmic Modeling Interface (AMI) added the ability to describe the signal processing (algorithmic) portions of channel in a standard way, along with the analog portion. The goals of this work target the development of models that are interoperable, portable, flexible, high-performance, accurate and secure. The addition of a back-channel interface (BCI) specification allows simulation of channels that employ link training, which involves optimizing transmitter characteristics based on receiver observations, sent as messages over the channel.

The presentation included remarks from Steven Parker (senior staff engineer at Marvell) and Jared James (principal product engineer at Cadence).  Their remarks focused on modeling a 56G PAM4 SerDes that was designed by the GLOBALFOUNDRIES team prior to their acquisition by Marvell. Methods to achieve interoperability between different tools using the IBIS-AMI standard were discussed, along with an overview of using the BCI to implement simulations of back-channel optimization. The figure below shows the process flow to implement back-channel training.

Back-channel training process

From a big picture point of view, the figure below illustrates the predicted improvements in channel performance based on the use of link training.

Results (with and without BCI)Predicted improvements in channel performance based on the use of link training

Cadence developed a SerDes model for its Sigrity SystemSI technology using IEEE constructs.  The Marvell model was built using internal tools. Marvell then modified its model to conform to the constructs used by Cadence and a system simulation was then built using the Cadence tools for transmit and the Marvell tools for receive. An excellent example of the cross-platform compatibility offered by IBIS-AMI. Some of the lessons learned from this work include:

  • The need for a command acknowledge function to determine the specific command that caused limits of calibration for the receiver to be reached
  • Consistent command sequence numbering to ensure commands remain in order
  • Setting the timing of commands correctly – too little time and the transmitter may not be able to react, too much and there will be dead time, extending simulation runs

And some comments on potential interoperability improvements:

  • Protocol compatibility improvement: develop de-facto standards to support popular training schemes
  • Open source an API for available models that describes the interface to the model and its files
  • A more general specification from IBIS to handle a broader range of applications

The work presented has been used successfully on several projects. Inter-vendor interoperability can be achieved with proper planning and coordination. This work has broad application going forward, including support for the emerging chiplet market.

 


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