We’re confirming seats for our first two SiFive Tech Symposiums in 2020. The first will take place in San José, Costa Rica on February 25, and the second will be in Mexico City, Mexico, on February 28. Just like our 2019 symposiums, these events are designed to engage the global hardware community in the RISC-V ecosystem, and to further promote the revolution that’s taking place within the semiconductor industry.
We’re proud to have Western Digital is our co-host in Costa Rica, and the Computing Research Center at CIC-IPN is our co-host in Mexico. Both events will feature presentations on RISC-V development tools, platforms, core IP and SoC IP, as well as talks about the exciting opportunities stemming from RISC-V, and the leading-edge research taking place in academia. Both events will also include a hands-on workshop where attendees will have the opportunity to configure their own RISC-V core and bring up on an FPGA.
Attendance is free, but registration is required.
- Tuesday, February 25, 2020 View Agenda & Register to Attend
San José, Costa Rica
Co-located with LASCAS 2020
- Friday, February 28, 2020 View Agenda & Register to Attend
Mexico City, Mexico
Instituto Politécnico Nacional/National Polytechnic Institute of México
The learn more about other SiFive Tech Symposiums taking place throughout the world in 2020, please visit the website, and check back often for updates. We look forward to seeing you soon!
About RISC-V Foundation
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 500 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.
SiFive is the leading provider of market-ready processor core IP, development tools and silicon solutions based on the free and open RISC-V instruction set architecture. Led by a team of seasoned silicon executives and the RISC-V inventors, SiFive helps SoC designers reduce time-to-market and realize cost savings with customized, open-architecture processor cores, and democratizes access to optimized silicon by enabling system designers in all market verticals to build customized RISC-V based semiconductors. With 14 offices worldwide, SiFive has backing from Sutter Hill Ventures, Spark Capital, Osage University Partners, Chengwei, Huami, SK Hynix, Intel Capital, and Western Digital. For more information, www.sifive.com.