WP_Term Object
(
    [term_id] => 48
    [name] => SiFive
    [slug] => sifive
    [term_group] => 0
    [term_taxonomy_id] => 48
    [taxonomy] => category
    [description] => 
    [parent] => 178
    [count] => 29
    [filter] => raw
    [cat_ID] => 48
    [category_count] => 29
    [category_description] => 
    [cat_name] => SiFive
    [category_nicename] => sifive
    [category_parent] => 178
)

Considering SiFive: What Should I Get to Implement a RISC-V Core?

Considering SiFive: What Should I Get to Implement a RISC-V Core?
by Randy Smith on 06-17-2019 at 10:00 am

I have an old weathered leather-clad black notebook with a National Semiconductor logo on its face that I have used since 2001. It has sentimental value to me. First, it reminds me of where I was on 9/11, having breakfast with a group of attendees to National Semiconductor’s executive event in Laguna Niguel, CA. We were going to play golf that morning and we were watching CNN when the tragic events took place. The notebook also takes me back to that time when I was running sales and marketing for TriMedia Technologies, a Philips Semiconductor spinoff that was producing VLIW core processor IP. ARM was in its early growth phase before increasing its stock ~10x between 2004 and 2015. By 2001, InfoWorld awarded Red Hat its fourth consecutive “Operating System Product of the Year” award for Red Hat Linux 6.1 and open source was well on its way in the operating systems market. It is exciting now to consider what is taking place with RISC-V, an open source core.

It turns out that determining what to include in the delivery of a proprietary soft IP core and an open source core is not that different. You want a dependable company to supply a core that it has tested fully. You need good documentation and a thriving ecosystem. The data file formats are well-known industry standards. But in considering RISC-V, there is another layer here. RISC-V is indeed open source, but it is also quite extensible. Which features do you want to be included and which features do you need? This is where your choice of vendors matters.

I met Naveed Sherwani, the CEO of SiFive many years ago when he was leading Open-Silicon. When we connected by phone last year, I got caught up with what was going on at SiFive at the time. I have not had the chance to talk with him since then, but clearly, SiFive has been very busy since then. Glancing at the SiFive website I see they are now delivering many different standard IP cores, as well as development boards and software. The documentation page lists a dozen core manuals. To have your design be efficient as possible, you need a good choice of cores, but further customization is often needed, and SiFive can provide that as well. I won’t make a comparison with ARM as I was under NDA to ARM while running marketing at Sonics just a few years ago. But clearly, SiFive is off and running now.

The customization tool of SiFive, Core Designer, is quite impressive. Via the SiFive cloud interface you select either 32-bit or 64-bit, then your operating system requirements, and you are narrowed down to a few choices of fully qualified cores. From there you can go on to customize the core you pick with the unique features needed for your application – that is why these are being called “Application-specific processors” (ASP). You can choose from different modes to be supported, the level of pipelining needed, various instruction set architecture (ISA) extensions that are available, the amount and arrangement of on-chip memory, the configuration of various ports (e.g., AHB, JTAG, etc.), security features, debug options, interrupts, and power management options. Quite a bit of customization is available. The speed at which SiFive is building out its IP portfolio is truly amazing.

SiFive is expected to release Chip Designer sometime soon. SiFive claims this will be a new way of building custom silicon. In the design step, you are to choose the template that suits your application. Templates now are shown on the website range from 28nm to 180nm implementations. You can create variations on your design using a library of IP from SiFive’s DesignShare Partners or with your own IP. Prototyping will then allow you to run your application code and make changes to your design until you are happy with the performance. Then you order and SiFive will deliver sample chips in some number of weeks. This is an interesting approach. I have heard of similar approaches elsewhere and I cannot wait to hear the specific details of what SiFive is planning to deliver.

SiFive has indeed come a long way in a very short time. It is amazing to see how the landscape of core processor IP as developed over the past 20 years or so. By delivering cores, tools, prototyping, a large ecosystem and more SiFive seems to have what is needed to move forward quickly with a customized RISC-V core to support your own ASP. Hold on tight – I feel that the next two years will move us at warp speed in comparison.