SILVACO 073125 Webinar 800x100
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IMEC Technology Forum at SEMICON – Coventor could save you billions!

IMEC Technology Forum at SEMICON – Coventor could save you billions!
by Scotten Jones on 07-22-2016 at 7:00 am

The development of leading edge semiconductor technology is incredibly expensive, with estimates ranging from a few to several billion dollars for new nodes. The time to develop a leading edge process is also a critical competitive issue with some of the largest opportunities awarded based on who is first to yield on a new node.… Read More


A Brief History of Platform Design Automation

A Brief History of Platform Design Automation
by Daniel Payne on 07-01-2016 at 12:00 pm

Two weeks ago I spoke on the phone with Albert Li, Founder and CEO of Platform DA about his EDA company. Prior to founding Platform DA in Beijing, Li worked at Accelicon which was acquired by Agilent in December 2011. Mr. Li graduated from Tsinghua University and Vanderbilt University, both in Electrical Engineering, and has written… Read More


Two New Announcements from Tanner EDA at #53DAC

Two New Announcements from Tanner EDA at #53DAC
by Daniel Payne on 06-27-2016 at 12:00 pm

Most mergers and acquisitions in the EDA world simply don’t work out financially a year or two after the deal is done, however I was pleasantly surprised to learn that Tanner EDA is doing quite well at #53DAC this year after the acquisition by Mentor Graphics back in March 2015. Everyone that I’ve been meeting with at … Read More


Semiconductor IP QA Standards Get a Boost at #53DAC

Semiconductor IP QA Standards Get a Boost at #53DAC
by Daniel Payne on 06-22-2016 at 12:00 pm

At the #53DAC earlier this month held in Austin, Texas I met up with Renee Donkers, the founder of Fractal Technologies. His company has been focused on improving the quality of semiconductor IP cells through the use of automated checking software. The highest area of growth in EDA as measured by the ESD Alliance is in the reusable… Read More


Blue Pearl adds RTL project transparency at #53DAC

Blue Pearl adds RTL project transparency at #53DAC
by Don Dingee on 06-03-2016 at 4:00 pm

You’re an RTL pro. You know what’s inside your code, and how many bugs you’ve tracked down and exterminated along the development path, and how much work remains. So, why did the meeting notice that just popped up asking for a monthly management project review presentation ruin your day?… Read More


iDRM – A Complete Design Rule Development System

iDRM – A Complete Design Rule Development System
by Daniel Nenni on 06-02-2016 at 12:00 pm

Design rules are at the heart of the interface between the foundry and semiconductor designers, which makes them so critical. Traditionally, design rules and DRC decks have been developed manually with no or little automation. Design rule definitions are written using WORD or other general purpose office tools, and DRC decks… Read More


DRC Concept for IP Qualification and SoC Integration

DRC Concept for IP Qualification and SoC Integration
by Pawan Fangaria on 05-30-2016 at 7:00 am

In the history of semiconductor design and manufacturing, the age-old concept of DRC rule-deck qualification for handshake between design and manufacturing still applies strongly to produce working silicon. In fact, DRC clean GDSII works as the de facto golden gate between a design and a foundry for manufacturing the chip for… Read More


Moving chips from industrial to industrial IoT

Moving chips from industrial to industrial IoT
by Don Dingee on 05-27-2016 at 4:00 pm

IHS has put out its 1Q2016 Application Market Forecast predicting the highest growth rate segments for semiconductors over the next five years – and what was once old is new yet again. There it is, in the top right corner: industrial, projected to outpace even the automotive sector.… Read More


SRAM Optimization for 14nm and 28nm FDSOI

SRAM Optimization for 14nm and 28nm FDSOI
by Daniel Payne on 05-16-2016 at 4:00 pm

I’ve done SRAM and DRAM design before as a circuit designer from 1978-1986, but in 2016 there are so many more challenges to using 28nm and 14nm on FDSOI technology. One way to keep abreast of SRAM design is to read conference papers, so I just finished a paper from authors at STMicroelectronics and MunEDA presented at the IEEE… Read More