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Shifting Left with Static and Formal Verification

Shifting Left with Static and Formal Verification
by Bernard Murphy on 12-14-2017 at 7:00 am

Unless you have been living in a cave for the last several years, by now you know that “Shift Left” is a big priority in product design and delivery, and particularly in verification. Within the semiconductor industry I believe Intel coined this term as early as 2002, though it seems now to be popular throughout all forms of technology… Read More


DSP Benchmarks and Libraries for ARC DSP families

DSP Benchmarks and Libraries for ARC DSP families
by Eric Esteve on 12-13-2017 at 12:00 pm

Synopsys DesignWareARC HS4xD family is a perfect example of high performance DSP, enhanced RISC CPU IP core, able to address high-end IoT, mid to high-end audio or baseband control. ARC HS4xD architecture is 10-stage pipeline for high Fmax, resulting in excellent RISC efficiency with 5.2 CoreMark per MHz. ARC EMxD processorsRead More


Starblaze Uses Synopsys DesignWare IP to Launch SSD Controller SoC

Starblaze Uses Synopsys DesignWare IP to Launch SSD Controller SoC
by Mitch Heins on 12-12-2017 at 12:00 pm

I recently wrote an article about Synopsys’ DesignWare Security IP for the Internet-of-Things market and was interested to see that a startup, Starblaze Technology, has now used parts of the same IP in its latest Solid-State Drive (SSD) controller. The security IP caught my eye, but the rest of the story really put things into focus.… Read More


Synopsys White Paper on IoT Security – Introduces DesignWare Root-of-Trust Module

Synopsys White Paper on IoT Security – Introduces DesignWare Root-of-Trust Module
by Mitch Heins on 12-11-2017 at 12:00 pm

As the internet of things (IoT) continues its climb to a trillion devices, there has been many articles and books written on the need for securing those devices. With all the IoT gear that I seem to be picking up as Christmas presents, I feel like I’m doing my part to help the market get there, but I have to say, I sure hope the SoC designers… Read More


High performance processor IP targets automotive ISO 26262 applications

High performance processor IP targets automotive ISO 26262 applications
by Tom Simon on 11-09-2017 at 12:00 pm

The reason you are seeing a lot more written about the ISO 26262 requirements for automotive electronics is, to put it bluntly, this stuff is getting real. Driver assist systems are no longer only found in the realm of Mercedes and Tesla, almost every car in every brand offers some driver assist features. However, the heavy lifting… Read More


VESA DSC Encoder Enables MIPI DSI to Support 4K resolutions

VESA DSC Encoder Enables MIPI DSI to Support 4K resolutions
by Eric Esteve on 11-08-2017 at 12:00 pm

Some of the MIPI specifications are now massively used in mobile (smartphone), like the Multimedia related specs, Camera Serial Interface (CSI-2) and Display Serial Interface (DSI). These specifications are now adopted inautomotive infotainment systems, and augmented reality (AR)/ virtual reality (VR) devices. If you Read More


TSMC EDA 2.0 With Machine Learning: Are We There Yet ?

TSMC EDA 2.0 With Machine Learning: Are We There Yet ?
by Alex Tan on 11-06-2017 at 7:00 am

Recently we have been swamped by news of Artificial Intelligence applications in hardware and software by the increased adoption of Machine Learning (ML) and the shift of electronic industry towards IoT and automobiles. While plenty of discussions have covered the progress of embedded intelligence in product roll-outs, anRead More


Synopsys discusses the challenges of embedded vision processing

Synopsys discusses the challenges of embedded vision processing
by Tom Simon on 11-01-2017 at 12:00 pm

Before the advent of convolutional neural networks (CNN), image processing was done with algorithms like HOG, SIFT and SURF. This kind of work was frequently done in data centers and server farms. To facilitate mobile and embedded processing a new class of processors was developed – the vision processor. In addition to doing a … Read More


Webinar: Optimizing QoR for FPGA Design

Webinar: Optimizing QoR for FPGA Design
by Bernard Murphy on 10-22-2017 at 12:00 pm

You might wonder why, in FPGA design, you would go beyond simply using the design tools provided by the FPGA vendor (e.g. Xilinx, Intel/Altera and Microsemi). After all, they know their hardware platform better than anyone else, and they’re pretty good at design software too. But there’s one thing none of these providers want to… Read More


An Informal Update

An Informal Update
by Bernard Murphy on 10-05-2017 at 7:00 am

I mentioned back in June that Synopsys had launched a blog on formal verification, intended to demystify the field and provide help in understanding key concepts. It’s been a few months, time to check in on some of their more recent posts.


First up, it feels like they are finding their groove. Relaxed style, useful topics but now with… Read More