SILVACO 051525 Webinar 800x100 v2
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A New STA Tool at DAC, No Not Cadence

A New STA Tool at DAC, No Not Cadence
by Daniel Payne on 06-19-2013 at 12:15 pm

The big EDA companies get big attention at DAC, however sometimes the little EDA start-ups like Arcadia Innovationhave a new product that can be overlooked. On Tuesday at DAC I met with Joey Lin, founder of Arcadia Innovation and learned about his new STA (Static Timing Analysis) tool called TimeHawk .… Read More


Tela Innovations, DAC Update

Tela Innovations, DAC Update
by Daniel Payne on 06-13-2013 at 12:16 pm

Lawsuits in EDA are common, and Tela Innovationsfiled a huge complaint back in February with the U.S. International Trade Commission (USITC) against HTC Corporation; HTC America, Inc.; LG Electronics, Inc.; LG Electronics U.S.A., Inc.; LG Electronics MobileComm U.S.A., Inc.; Motorola Mobility LLC; Nokia Corporation; Nokia,… Read More


GPU-Based SPICE Simulator for Library Characterization

GPU-Based SPICE Simulator for Library Characterization
by Daniel Payne on 06-13-2013 at 11:55 am

Jeff Tuanis the CEO and President of an EDA startup called G-Analog, founded in May 2012. His background includes working at: Cadence, Epic, Synopsys, Nassda, Chartered Semi and GLOBALFOUNDRIES. Jason Lu is the R&D manager. We met at DAC last week to talk about his company’s new product called Gchar for IC library characterization… Read More


So, where are all the EMBEDDED guys?

So, where are all the EMBEDDED guys?
by Don Dingee on 06-12-2013 at 8:15 pm

Roaming the aisles at #50DAC the past week left me with one unmistakable impression: there were two shows going on at the same time. Oh, we were all packed into one space together at the Austin Convention Center and neighboring hotels. But we weren’t quite all speaking the same language – yet.… Read More


Hardware Assisted Verification

Hardware Assisted Verification
by Paul McLellan on 06-10-2013 at 9:00 pm

On the Tuesday of DAC I moderated a panel session on Hardware Assisted Verification in 10 Years: More Need, More Speed. Although this topic obviously could include FPGA-based prototyping, in fact we spent pretty much the whole time talking about emulation. Gary Smith, on Sunday night, actually set up things by pointing out that… Read More


SoC Sign-off, Real Intent at DAC

SoC Sign-off, Real Intent at DAC
by Daniel Payne on 06-09-2013 at 8:10 pm

Monday morning at DAC I met with Real Intent to get an update on their SoC sign-off tools:

  • Dr. Prakash Narain, President and CEO
  • Graham Bell, Sr. Dir. Mktg.

Years ago Prakash was at IBM the only two years that they attended DAC, in an attempt to offer their internal EDA tools to the EDA marketplace. Graham worked at Nassda marketing the… Read More


First FinFETs Manufactured at #50DAC!

First FinFETs Manufactured at #50DAC!
by Daniel Nenni on 06-09-2013 at 5:00 pm


This was my 30[SUP]th[/SUP] DAC and the second most memorable. The most memorable was my second DAC (1985) in Las Vegas with my new bride. We had a romantic evening ending with ice cream sundaes at midnight that we still talk about. This year SemiWiki had Dr. Paul McLellan, Dr. Eric Esteve, Daniel Payne, Don Dingee, Randy Smith, and… Read More


DAC: Gary Smith: Don’t Give Away Your Models

DAC: Gary Smith: Don’t Give Away Your Models
by Paul McLellan on 06-06-2013 at 4:10 am

As is now traditional, Gary Smith kicked off DAC proper (there were workshops earlier and some co-located conferences started days before). He started by dismissing the idea that it costs $170M to do an SoC design.

In fact he looked at 3 different cases. Firstly, the completely unconstrained design. Well, no design is completely… Read More