Lauro Rizzatti offers Semiwiki readers a two-part series on why three kinds of hardware-assisted verification engines are now a must have for semiconductor designs continues today. His interview below with Juergen Jaeger, Prototyping Product Strategy Director in the Scalable Verification Solution division at Siemens EDA,… Read More
Electronic Design Automation
Resilient Supply Chains a Must for Electronic Systems
The last few years have seen multiple disruptions in the supply chain in many industries. One of the key technologies that many fingers have pointed to is the semiconductor technology. As products in all industries become more electronics based, semiconductors play a key role since no end system could function today without … Read More
Five Key Workflows For 3D IC Packaging Success
An earlier blog started with the topic of delivering 3D IC innovations faster. The blog covered the following foundational enablers for successful heterogeneous 3D IC implementation.
- System Co-Optimization (STCO) approach
- Transition from design-based to systems-based optimization
- Expanding the supply chain and tool
A faster prototyping device-under-test connection
When discussing FPGA-based prototyping, we often focus on how to pour IP from a formative SoC design into one or more FPGAs so it can be explored and verified before heading off to a foundry where design mistakes get expensive. There’s also the software development use case, jumpstarting coding for the SoC before silicon … Read More
IC Layout Symmetry Challenges
Many types of designs, including analog designs, MEMs, and image sensors, require electrically matched configurations. This symmetry has a huge impact on the robustness of the design across process variations, and its performance. Having an electrically matched layout basically means having a symmetric layout. To check … Read More
Verifying 10+ Billion-Gate Designs Requires Distinct, Scalable Hardware Emulation Architecture
In a two-part series, Lauro Rizzatti examines why three kinds of hardware-assisted verification engines are a must have for today’s semiconductor designs. To do so, he interviewed Siemens EDA’s Vijay Chobisa and Juergen Jaeger to learn more about the Veloce hardware-assisted verification systems.
What follows is part one,… Read More
Getting Ahead with Semiconductor Manufacturing Equipment and Related Plasma Reactors
Advanced semiconductor fabrication technology is what makes it possible to pack more and more transistors into a sq.mm of a wafer. The rapidly increasing demand for advanced-process-based chips has created huge market opportunities for semiconductor manufacturing equipment vendors. According to SEMI, worldwide sales … Read More
Automating and Optimizing an ADC with Layout Generators
I first got involved with layout generators back in 1982 while at Intel, and about 10% of a GPU was automatically generated using some code that I wrote. It was an easy task for one engineer to complete, because the circuits were digital, and no optimization was required. In an IEEE paper from the 2022 18th International Conference… Read More
Hazard Detection Using Petri Nets. Innovation in Verification
Modeling and verifying asynchronous systems is a constant challenge. Petri net models may provide an answer. Paul Cunningham (GM, Verification at Cadence), Raúl Camposano (Silicon Catalyst, entrepreneur, former Synopsys CTO and now Silvaco CTO) and I continue our series on research ideas. As always, feedback welcome.
The
… Read MoreEDA Product Mix Changes as Hardware-Assisted Verification Gains Momentum
The Design Automation Conference, as always, is a good barometer on the state of EDA and my area of interest, verification. The recent DAC offered plenty of opportunities to check on trends and the status quo.
Remarkably, exhibitors and attendees were upbeat about the chip design landscape despite concerns about supply chain … Read More
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