Webinar Banner 2
WP_Term Object
(
    [term_id] => 50
    [name] => Events
    [slug] => events
    [term_group] => 0
    [term_taxonomy_id] => 50
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 1071
    [filter] => raw
    [cat_ID] => 50
    [category_count] => 1071
    [category_description] => 
    [cat_name] => Events
    [category_nicename] => events
    [category_parent] => 0
)

EDA Product Mix Changes as Hardware-Assisted Verification Gains Momentum

EDA Product Mix Changes as Hardware-Assisted Verification Gains Momentum
by Lauro Rizzatti on 08-23-2022 at 10:00 am

Semiwiki Hero Image Lauro Rizzatti eda

The Design Automation Conference, as always, is a good barometer on the state of EDA and my area of interest, verification. The recent DAC offered plenty of opportunities to check on trends and the status quo.

Remarkably, exhibitors and attendees were upbeat about the chip design landscape despite concerns about supply chain shortages and the impending semiconductor downturn. Based on my informal analysis, the hardware-assisted verification (HAV) segment and the future for chip design verification looks exceedingly bright. The big three players (Cadence, Siemens EDA and Synopsys) all hint at big gains in HAV tool adoption and point to emerging market segments for this growth.

Three executive-level presentations from three financial and market analysts that were part of the DAC program confirmed what I think and helped put into perspective the outlook for the EDA and semiconductor industry.

Sunday night, Charles Shi, Principal, Senior Analyst at Needham & Company, talked about “EDA to Power Through Semiconductor Cycles.” Shi reminded us that the semiconductor industry is cyclical and appears to be on the brink of a downturn. More positively, he outlined the reasons why the EDA industry will power through semiconductor cycles and emerge stronger on the other side.

Shi pointed to the slowdown of Moore’s Law driving secular growth of EDA and reminded attendees that EDA is part of an interdependent ecosystem that includes fabless, IP, foundry, equipment and materials. He added that chiplets are creating greater design complexity as the industry moves from 2D to 2.5/3D ICs, forcing stronger EDA and IP collaboration and tightly coupled package/chip co-design for faster design convergence. According to Shi, this means design and verification are getting harder and system-level design and analysis will increase EDA spending.

His last slide predicted that EDA is going to be okay if there is a recession and a semiconductor downcycle. Foundry, EDA and IP growth will continue to outperform the semiconductor industry, Shi concluded.

From my perspective, this is good news and portends many more opportunities for HAV as we move into more diverse applications areas and help manage chip functionality.

Rich Wawrzyniak, Senior Market Analyst from Semico Research, seemed to concur with Shi. He presented a well-balanced talk on “Semiconductor Market Trends: Tying it all Together for the Big Picture” Monday at the DAC Pavilion, beginning with a current assessment of the landscape. While semiconductor sales are high –– 26% growth in 2021, 6.3% projected for 2022 –– there’s a potential for a -0.9% forecast in 2023. Mitigating factors could create a downturn despite ongoing demand, a tight labor market and new application areas, he cautioned.

Much like Shi, Wawrzyniak pointed to advanced SoCs with elevated complexity levels and gate counts as drivers for increased functionality and performance. Wawrzyniak further pointed to the growing number of IP blocks per chip rises with each new process node and a reason for rising design costs.

As he wrapped up, Wawrzyniak predicted continued EDA revenue growth with more designs and more complex design starts. EDA is starting to move into new areas for growth and diversification.

Again, I concluded that more functionality and performance in a chip combined with more chip applications demand HAV solutions.

Jay Vleeschhouwer, Managing Director of Griffin Securities, presented “The State of EDA: A View from Wall Street” Tuesday in the DAC Pavilion. The most analytical of the three presentations, it nonetheless painted a positive view of EDA. For example, he noted that the EDA industry has grown each year for more than a decade with revenue surpassing $10 billion in 2021. The growth, he said, has been sustained across multiple product categories, a result of semiconductor and system engineering requirements in design, process and system complexity.

One the most important product mix changes over the past five to 10 years, according to Vleeschhouwer, has been the growth of HAV, both hardware emulation and FPGA prototyping. While he didn’t break out HAV revenue specifically, I estimate it’s approaching $1 billion, a huge revenue increase from hovering around $300-$500 million for almost two decades or since 2000.

Vleeschhouwer identified two areas where semiconductor company are investing –– software development and silicon development. He added that investments in silicon development remains where the majority of EDA revenue comes from. Software development is welcome news for HAV suppliers since it’s the only verification solution to support both software and silicon.

Given we’re more than halfway through 2022, we should expect more good news through yearend. Next year’s DAC could have a vibrant exhibit floor with attendees flocking to see the latest product news. I look forward to it and think you will, too.

Also Read:

An EDA AI Master Class by Synopsys CEO Aart de Geus

ARC Processor Summit 2022 Your embedded edge starts here!

WEBINAR: Design and Verify State-of-the-Art RFICs using Synopsys / Ansys Custom Design Flow

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.