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Ausdia’s Timevision

Ausdia’s Timevision
by Paul McLellan on 06-11-2012 at 8:05 pm

I met Sam Appleton of Ausdia during DAC. I found it quite hard to understand exactly what they do. I’ve talked before about something that I nick-named City Slickers’ Marketing. It is named after the following exchange from the movie City Slickers:Curly: Do you know what the secret of life is? [holds up one finger] This.Read More


One Billion Transistor IC Layout Editing

One Billion Transistor IC Layout Editing
by Daniel Payne on 06-11-2012 at 6:33 pm

There are only a handful of billion transistor IC designs in existence today, so when an EDA company touts 1 trillion transistor IC layout editing then I take notice. This year at DAC I met with Katherine Hayes and Karen Mangum of Micro Magic to get an update on their IC layout tools.… Read More


From SPICE Netlist back to Schematics at DAC

From SPICE Netlist back to Schematics at DAC
by Daniel Payne on 06-11-2012 at 5:22 pm

I first heard about SPICE Vision Pro when working at Mentor Graphics where we needed a way to visualize SPICE netlists and debug SPICE simulation results node by node on a design where we didn’t have the original schematics. Last Monday I met the engineers from Concept Engineering in their booth at DAC to get an update, Gerhard… Read More


Cadence/TSMC 3D

Cadence/TSMC 3D
by Paul McLellan on 06-11-2012 at 5:16 pm

Mark Twain remarked that everyone talks about the weather but nobody does anything about it. 3D ICs seems to be a bit like that. Over the last couple of years there have been lots of people talking about 3D but very little that has actually been manufactured. In addition to the weather, everyone talks about Xilinx’s 3D Virtex… Read More


A DAC Update from Mentor Graphics on IC Layout and Circuit Simulation Tools

A DAC Update from Mentor Graphics on IC Layout and Circuit Simulation Tools
by Daniel Payne on 06-11-2012 at 4:07 pm

Linda Fosler, Tom Daspit and Mitch from Mentor Graphics met with me last Monday at DAC to provide an update on IC layout and circuit simulation tools. My notes follow:

Overview – Pyxis for Schematic and Layout, IC Station is re-branded as Pyxis. (Pyxis schematic is still Falcon, Ample language is still used.)… Read More


Schematic, IC Layout, Clock and Timing Closure from ICScape

Schematic, IC Layout, Clock and Timing Closure from ICScape
by Daniel Payne on 06-08-2012 at 11:10 am

Before this DAC I had never even heard of ICScape, so on Monday and Wednesday I visited their booth to find out their story.

Steve Yang, Ph.D. (Co-founder and President), Ravi Ravikumar (Marketing)

ICScape was founded in 2005 in Santa Clara by Steve Yang (Circuit Design engineer for microprocessor, Synopsys) and Jason Xing (Sun… Read More