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The Carbon Decade

The Carbon Decade
by Paul McLellan on 04-19-2012 at 6:00 am

Carbon Design Systems celebrates its 10th anniversary this month. It is a celebration that the company has survived a decade but also bittersweet that the company hasn’t been acquired for a juicy premium. But we just have to accept that EDA is not a business where you can throw together a company in 18 months and sell it for $1B… Read More


Changing your IC Layout Methodology to Manage Layout Dependent Effects (LDE)

Changing your IC Layout Methodology to Manage Layout Dependent Effects (LDE)
by Daniel Payne on 04-18-2012 at 12:38 pm

Smaller IC nodes bring new challenges to the art of IC layout for AMS designs, like Layout Dependent Effects (LDE). If your custom IC design flow looks like the diagram below then you’re in for many time-consuming iterations because where you place each transistor will impact the actual Vt and Idsat values, which are now a … Read More


Soft Error Rate (SER) Prediction Software for IC Design

Soft Error Rate (SER) Prediction Software for IC Design
by Daniel Payne on 04-16-2012 at 10:00 am

My first IC design in 1978 was a 16Kb DRAM chip at Intel and our researchers discovered the strange failure of Soft Errors caused by Alpha particles in the packaging and neutron particles which are more prominent at higher altitudes like in Denver, Colorado. Before today if you wanted to know the Soft Error Rate (SER) you had to fabricate… Read More


Atrenta’s Spring Cleaning Deal

Atrenta’s Spring Cleaning Deal
by Paul McLellan on 04-16-2012 at 9:00 am

Atrenta is having a special offer to let you “spring clean” your IP for free. They are providing two weeks of free access to the Atrenta IP kit starting from today, April 16th, until the end of May. During this period, qualified design groups in the US will be able to use the kit for two consecutive weeks to “spring… Read More


High Yield and Performance – How to Assure?

High Yield and Performance – How to Assure?
by Pawan Fangaria on 04-16-2012 at 7:30 am

In today’s era, high performance mobile devices are asserting their place in every gizmos we play with and guess what enables them work efficiently behind the scene – it’s large chunks of memory with low power and high speed, packed as dense as possible. Ever growing requirement of power, performance and area led us to process nodes… Read More


Chip in the Clouds – "Gathering"

Chip in the Clouds – "Gathering"
by Kalar Rajendiran on 04-13-2012 at 1:29 pm


Cloud computing is the talk of the tech world nowadays. I even hear commentaries about how entrepreneurs are turned down by venture capitalists for not including a cloud component into their business plan no matter what the core business may be. The commentary goes “It’s cloudy without any clouds.” Add some clouds to your strategy… Read More


I Love DAC

I Love DAC
by Paul McLellan on 04-13-2012 at 1:16 pm

For the fourth year Atrenta, Cadence and Springsoft are jointly sponsoring the “I LOVE DAC” campaign. In case you have been hibernating all winter, DAC is June 3-7th in San Francisco at the Moscone Center.

There are two parts to “I LOVE DAC”. First, if you register by May 15th (and they haven’t all… Read More


EDPS: 3D ICs, part II

EDPS: 3D ICs, part II
by Paul McLellan on 04-12-2012 at 10:00 pm

Part I is here.

In the panel session at EDPS on 3D IC a number of major issues got highlighted (highlit?).

The first is the problem of known-good-die (KDG) which is what killed off the promising multi-chip-module approach, perhaps the earliest type of interposer. The KDG problem is that with a single die in a package it doesn’t… Read More


Doing what others don’t do

Doing what others don’t do
by Paul McLellan on 04-12-2012 at 2:56 pm

Wally Rhines’ keynote at U2U, the Mentor users’ group meeting, was about Mentor’s strategy of focusing on what other people don’t do. This is partially a defensive approach, since Mentor has never had the financial firepower to have the luxury of focusing all their development on sustaining their products and then make … Read More


Cadence support for the Open NAND Flash Interface (ONFI) 3.0 controller and PHY IP solution + PCIe Controller IP opening the door for NVM Express support

Cadence support for the Open NAND Flash Interface (ONFI) 3.0 controller and PHY IP solution + PCIe Controller IP opening the door for NVM Express support
by Eric Esteve on 04-11-2012 at 10:19 am

The press release about ONFI 3.0 support was launched by Cadence at the beginning of this year. It was a good illustration of Denali, then Cadence, long term commitment to Nand Flash Controller IP support. The ONFI 3 specification simplifies the design of high-performance computing platforms, such as solid state drives and enterprise… Read More