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JasperGold COV App, the Swiss Army Knife for Verification

JasperGold COV App, the Swiss Army Knife for Verification
by Paul McLellan on 01-16-2014 at 12:55 am

At the Jasper Users Group meeting in October Rajeev Ranjan presented on the JasperGold COV App which he described as the Swiss army knife for verification. It comes in many sizes and contains many useful tools.

The primary goal of COV is to provide coverage metrics:

  • stimuli coverage: how restrictive is the design behavior under
Read More

Positive Semiconductor Job Outlook in 2014!

Positive Semiconductor Job Outlook in 2014!
by Daniel Nenni on 01-15-2014 at 5:00 pm

Based on local traffic patterns and my experience in Silicon Valley over the last 30 years we are looking at a much higher employment rate inside the fabless semiconductor ecosystem, absolutely. Jobs are being filled more so than I have seen in the past ten years. The challenge of course is finding the right people for the right job… Read More


Special Interest Group for HSPICE at DesignCon in Two Weeks

Special Interest Group for HSPICE at DesignCon in Two Weeks
by Daniel Payne on 01-13-2014 at 8:00 pm

DesignCon brings together engineers from around the world that are interested in IC design, package design and board design, plus the signal integrity issues of creating high-speed systems. In just two weeks there’s a Special Interest Group(SIG) just for users of HSPICE in their tool flow, and it meets for three hours during… Read More


How to Develop Accurate Yet High Performance Models

How to Develop Accurate Yet High Performance Models
by Pawan Fangaria on 01-13-2014 at 12:00 pm

In today’s environment of semiconductor design, SoCs are crammed with various IPs with multiple functionalities and processors integrated together. In such an event it has become necessary to model the system and verify on Virtual Platform before getting into actual design and fabrication. And that requires modelling of each… Read More


Social Media at Aldec

Social Media at Aldec
by Daniel Payne on 01-09-2014 at 5:38 pm

I’ve been blogging about EDA and Semiconductor companies using social media to create new ways to talk and listen to engineers, so today I looked at Aldec and how they are using social media. Aldec offers EDA products for: FPGA Simulation, functional verification, emulation, and MIL/Aero verification. Their Home page … Read More


Low Power @ DesignCon 2014

Low Power @ DesignCon 2014
by Daniel Nenni on 01-08-2014 at 11:00 am

Taking place annually in Silicon Valley, DesignCon is the premier educational conference and technology exhibition for electronic design engineers in the high speed communications and semiconductor communities.

Created by engineers for engineers, DesignCon is the largest gathering of chip, board and systems designersRead More


How to Optimize Analog IPs for High-end SoCs?

How to Optimize Analog IPs for High-end SoCs?
by Pawan Fangaria on 01-07-2014 at 12:00 pm

Gone are the days when analog design had its sweet space on a single chip. However, it’s the main driver in this new electronic world which is geared by Internet-of-Things, wireless, mobile, remote control and so on. How does an electronic device sense a touch by human, motion, temperature, sound etc.? It’s the analog circuitry … Read More


Mission Critical Role of Unmanned Systems – How to fulfill?

Mission Critical Role of Unmanned Systems – How to fulfill?
by Pawan Fangaria on 01-05-2014 at 11:30 am

Do we ever imagine what kind of severe challenges mission critical unmanned systems in air, land and underwater face? They are limited in space and size; have to be light in weight, flexible in different types of operations and at the same time rugged enough to work in extreme climatic conditions. That’s not enough; amidst these … Read More


New Frontiers in Scan Diagnosis

New Frontiers in Scan Diagnosis
by Paul McLellan on 01-03-2014 at 8:10 pm

As we move down into more and more advanced process nodes, the rules of how we test designs are having to change. One big challenge is the requirement to zoom in and fix problems by doing root cause analysis on test data alone, along with the rest of the design data such as detailed layout, optical proximity correction and so on. But without… Read More