When we talk about analog IC market, one can easily guess who the leader with lion’s share in the market is. There are also next level leaders with impressive growth rates in this market. The analog market as such is poised to grow with Internet of Things (IoT) because it supplies some of the key components such as data converters, op… Read More
Electronic Design Automation
EDAC Game of Thrones: Bob Smith is the New Executive Director
Bob Smith has been appointed executive director of EDAC, following the retirement of Bob Gardner after nearly 20 years. Bob (Smith) was most recently the marketing and business development VP for Uniquify. However, he has been in the industry for a long time with stints at IKOS, Synopsys, LogicVision and Magma. He has even been … Read More
Design Collaboration, Requirements and IP Management at #52DAC
For SoC designers attending DAC in June you probably want to check out the EDA vendors that enable design collaboration among your engineers and designers that are spread out across a building, campus or the globe. Dassault Systemes does offer tools and methodologies for: Design collaboration, requirements and IP management.… Read More
Chip Design – Coming of Age in the Computer Age
Previously, I examined chip design in the late 1970s and early 1980s. It was a nostalgic ride – thanks to all those who shared their stories. I enjoyed reading all of them. I drew two basic conclusions in the prior post:
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Saving Time and Money on Your Next SoC Project
Every SoC project that I know of wants to finish on time, under budget, and maximize profits per device. When I first started out doing DRAM design I learned that we could maximize profit by doing shrinks of existing designs, move from ceramic to plastic packages, and reduce the amount of time spent on a tester. Today, the economic … Read More
Beware of Parameter Variability in Clock Domain Crossings
How should we assess the risk of harmful metastability in a clock domain crossing (CDC) when the semiconductor process has significant parameter variability? One possibility is to determine the MTBF of a synchronizer at the worst-case corner of the CDC. But that approach has some conflicting complications:
- Synchronizer failures
ARM A57 (A53) Virtualizer + IP Accelerated = ?
Hybrid IP Prototyping Kit from Synopsys!
Synopsys has launched IP Accelerated initiative last year. The goal was clearly to accelerate Time-To-Market by providing a complete set of “tools” to augment design productivity:
- IP Prototyping Kit with reference designs work out-of-the-box
- IP software development kits enable early
Experts Talk at Mentor Booth
It’s less than four weeks to go at DAC 2015 and the program is final now. So I started investigating new technologies, trends, methodologies, and tools that will be unveiled and discussed in this DAC. In the hindsight of the semiconductor industry over the last year, I see 14nm technologies in the realization stage and 10nm beckoning… Read More
Breaking the SoC lab walls
There used to be this thing called the “computer lab”, with glowing rows of terminals connected to a mainframe or minicomputer. Computers required a lot of care and feeding, with massive cooling and power requirements. Microprocessors and personal computers appeared in the 1970s, with much smaller and less expensive machines… Read More
End of the Road for Micrel
Micrel Inc., one of the oldest chipmakers in Silicon Valley, has been acquired by Chandler, Arizona–based Microchip Technology Inc. for $839 million. A pure-play analog chip house will go to one of the leading microcontroller suppliers after regulatory approval amid the consolidation wave that has engulfed the semiconductor… Read More
Intel’s Pearl Harbor Moment