Synopsys IP Designs Edge AI 800x100
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EDA

Electronic Design Automation

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Power Analysis Needs Shift in Methodology

Power Analysis Needs Shift in Methodology
by Pawan Fangaria on 07-26-2015 at 7:00 am
Categories: EDA, Siemens EDA

It’s been the case most of the time that until we hit a bottleneck situation, we do not realize that our focus is not at the right spot. Similar is the case with power analysis at the SoC level. Power has become equally if not more important than the functionality and other parameters of an SoC, and therefore has to be verified earlier … Read More

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Device Noise Analysis, What Not to Do for AMS IC Designs

Device Noise Analysis, What Not to Do for AMS IC Designs
by Daniel Payne on 07-24-2015 at 12:00 pm
Categories: EDA, Siemens EDA

AMS IC designers have a lot to think about when crafting transistor-level designs to meet specifications and schedules, so the most-used tool in their kit is the trusted SPICE or FastSPICE circuit simulator to help analyze timing, power, sensitivity and even device noise. I just did a Google search for “device noise analysis… Read More

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Taking prototyping beyond prototypes

Taking prototyping beyond prototypes
by Don Dingee on 07-22-2015 at 12:00 pm
Categories: EDA, FPGA, S2C EDA

Everyone has heard the expression, “Half the job is having the right tool.” In the case of FPGA-based prototyping, however, the right tool for the job is only the beginning. What teams really need to think through is what exactly should be done with an FPGA-based prototyping tool?

The obvious answer is prototyping an SoC, pre-silicon.… Read More

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Synopsys Buys Bluetooth IP

Synopsys Buys Bluetooth IP
by Paul McLellan on 07-22-2015 at 7:00 am
Categories: IP, Synopsys

There is obviously a broad spectrum of semiconductor IP but broadly speaking it seems to fall into three buckets:

  • foundation IP: standard cells, memories
  • microprocessors and associated peripherals
  • interface IP

Foundation IP is where it all started. When I was at Compass Design Automation in the 1990s that was pretty much what… Read More

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Starvision and SOS, a Perfect Match

Starvision and SOS, a Perfect Match
by Paul McLellan on 07-21-2015 at 7:00 am
Categories: Cliosoft, Concept Engineering, EDA

SoC design these days is largely about assembling externally developed semiconductor IP with a small amount of differentiated content. Only companies who have to adopt new processes instantly develop a lot of their own IP. It makes more sense to license it. Partially because there is not a lot of differentiation in standards-based… Read More

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Choosing C++ or SystemC for High Level Synthesis

Choosing C++ or SystemC for High Level Synthesis
by Daniel Payne on 07-20-2015 at 12:00 pm
Categories: EDA

Most engineers learn by doing, and so at DAC in June an EDA vendor with High Level Synthesis (HLS) tools held a language tutorial on choosing C++ or SystemC for design and verification projects. The EDA company is Calypto, and Stuart Clubb put together the tutorial on using synthesizable C++ or SystemC. The design and verification… Read More

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Antun Domic, on Synopsys’ Secret Sauce in Design

Antun Domic, on Synopsys’ Secret Sauce in Design
by Paul McLellan on 07-20-2015 at 7:00 am
Categories: EDA, Synopsys

Antun Domic is the GM of the Design Group at Synopsys. I sat down with him a couple of weeks ago.

His name is Croatian although, of course, there was no Croatia back then it was part of Yugoslavia. But in fact he grew up in Chile and went to university there where he studied EE and math. He came to the US as a grad student and did a PhD at MIT in … Read More

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How ARM Implemented a Mali GPU using Logic Synthesis and Place/Route Tools

How ARM Implemented a Mali GPU using Logic Synthesis and Place/Route Tools
by Daniel Payne on 07-17-2015 at 12:00 pm
Categories: EDA, Synopsys

ARM is a well-known semiconductor IP provider and they often create a reference design so that SoC companies can have a starting point to work with. On the GPU side of IP the ARM engineers have an architecture called Mali, and a recent webinar hosted by Synopsys reviewed how the physical design area was minimized by using a combination… Read More

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How PowerArtist Interfaces with Emulators

How PowerArtist Interfaces with Emulators
by Pawan Fangaria on 07-16-2015 at 5:00 pm
Categories: Ansys, Inc., EDA, Siemens EDA

Last month in DAC I could see some of the top innovations in the EDA world. EDA is a key enabler for advances in semiconductor designs. Among a number of innovations worth mentioning (about which I blogged just after DAC), the integration of Mentor’s Veloce with ANSYS’ PowerArtist for power analysis of live applications caught my… Read More

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Coventor SEMulator3D, Now With Added Dopant, Diffusion, Illumination and More

Coventor SEMulator3D, Now With Added Dopant, Diffusion, Illumination and More
by Paul McLellan on 07-16-2015 at 7:00 am
Categories: Coventor, EDA

Coventor just rolled out the latest version of SEMulator3D, their virtual fabrication tool. Very conveniently it is SEMICON West this week and they have a booth. I dropped by and got a demo from David Fried, Coventor’s CTO about all the new stuff. He’s very proud of SEMulator3D’s new logo but mostly he is proud… Read More