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How to Secure a SoC while Keeping Area and Power Competitive?

How to Secure a SoC while Keeping Area and Power Competitive?
by Eric Esteve on 11-29-2016 at 7:00 am

I have attended LETI conference last June and remember the paper presented by Alain Merle, their security guru. Alain said that smart cards are secured because up to 50% of the Silicon area is dedicated to security. When you design a SoC to address applications like smart metering, NFC payment or embedded SIM, you know in advance … Read More


CEO Interview: Rene Donkers of Fractal Technologies

CEO Interview: Rene Donkers of Fractal Technologies
by Daniel Nenni on 11-28-2016 at 7:00 am

Fractal is another one of those very successful emerging EDA companies that you don’t read a lot about, except on SemiWiki. Rene Donkers is co-founder and CEO of Fractal Technologies, a company addressing IP quality assurance. This is a niche in the SoC tooling market that deserves some justification. Why not use an IP as-is… Read More


CEO Interview: Albert Li of Platform DA

CEO Interview: Albert Li of Platform DA
by Daniel Nenni on 11-27-2016 at 7:00 am

Platform Design Automation, Inc (PDA). recently closed a US$6 million pre Series A investment round, and the company has shifted its focus from providing SPICE modeling related software and services to forming a complete AI-driven ecosystem from probing to simulation. Albert Li was the GM of Accelicon, a leading EDA tool and … Read More


Cadence Design Secures Photonic Beachhead

Cadence Design Secures Photonic Beachhead
by Mitch Heins on 11-23-2016 at 12:00 pm

I had the privilege to attend a five-day PIC (photonic integrated circuit) training hosted by 7-Penniesand Tektronix in San Jose, CA this week. This training was quite comprehensive and covered photonic materials and platforms, design automation, fabrication, packaging and test. It also included invited talks from photonic… Read More


ATPG, Automotive and 7nm FinFET

ATPG, Automotive and 7nm FinFET
by Daniel Payne on 11-22-2016 at 4:00 pm

The state of Texas hosted two or our industry’s big technical conferences and trade shows this year: DAC and ITC (International Test Conference). IC designers know about DAC in Austin, and test engineers know about ITC in Dallas. I travelled to Austin to cover DAC this past summer, and I was able to connect with Robert Ruiz … Read More


Mentor DefectSim Seen as Breakthrough for AMS Test

Mentor DefectSim Seen as Breakthrough for AMS Test
by Mitch Heins on 11-21-2016 at 4:00 pm

For decades, digital test has been fully automated including methodologies and automation for test pattern generation, grading and test time compression. Automation for analog and mixed-signal (AMS) IC test has not however kept pace. This is troubling as according to IBSapproximately 85% of SoC design starts are now AMS designs.… Read More


Embedded Agility

Embedded Agility
by Bernard Murphy on 11-21-2016 at 12:00 pm

A familiar refrain in software development, as much as in hardware development, is that the size and complexity of projects continues to grow as schedules shrink and expectations of quality can increase dramatically. A common approach to managing this challenge in software programs is agile development practices and one aspect… Read More


Solido DA is One of Deloitte’s Fastest 50!

Solido DA is One of Deloitte’s Fastest 50!
by Daniel Nenni on 11-20-2016 at 8:00 pm

As a longtime EDA professional this really made my day. At a time where emerging EDA companies struggle for public validation, it warms my heart to see some very public recognition for an EDA job well done.

Deloitte, a leading Canadian professional financial services firm, announced the winners of their Technology Fast 50 program… Read More


Ford Motors Discusses Future Mobility Trends at Synopsys Seminar

Ford Motors Discusses Future Mobility Trends at Synopsys Seminar
by Tom Simon on 11-17-2016 at 4:00 pm

Five or ten years ago it would have been hard to imagine someone from Ford Motors giving the keynote at a technology summit at a major EDA company like Synopsys. However, on November 2[SUP]nd[/SUP], Synopsys hosted a seminar on the topic of Automotive Architecture Design and System Testing, and Ford Technical Fellow Jim Buczkowski… Read More


IC Design Management: Build or Buy?

IC Design Management: Build or Buy?
by Daniel Payne on 11-17-2016 at 12:00 pm

When I first started doing circuit design with Intel at the transistor level back in the late 1970’s we had exactly two EDA tools at our disposal: an internally developed SPICE circuit simulator, and a commercial IC layout system. Over the years at Intel the internal CAD group added many more automation tools: gate level simulator,… Read More