It’s hard to believe but this is DesignCon #22 and being a Silicon Valley conference I have attended my fair share of them. This year it seems like high speed communications will take the lead followed by the latest on PCB design tools, power and signal integrity, jitter and crosstalk, test and measurement tools, parallel and memory interface design, ICs, semiconductor components, etc…
DesignCon is the world’s premier conference for chip, board, and systems design engineers in the high-speed communications and semiconductor communities.DesignCon, created by engineers for engineers, takes place annually in Silicon Valley and remains the largest gathering of chip, board, and systems designers in the country. This three-day technical conference and expo combines technical paper sessions, tutorials, industry panels, product demos and exhibits from the industry’s leading experts and solutions providers. More information is available at: designcon.com. DesignCon is organized by UBM Americas, a part of UBM plc (UBM.L), an Events First marketing and communications services business. For more information, visit ubmamericas.com.
The conference theme this year lands squarely inside Mentor’s wheelhouse so they will be hard to miss. The Mentor HyperLynx product family will be front and center in the Mentor booth. If you are interested in any of the following technologies you will definitely want to stop by booth #1043 for demos and chats with experts:
HyperLynx Signal Integrity
Quickly identify and resolve Signal Integrity issues. Includes advanced tools for optimizing DDRx design, SERDES design projects, FastEye diagram analysis, S-parameter simulation, and BER prediction.
HyperLynx Power Integrity
Accurately model power distribution networks and noise propagation mechanisms throughout the PCB design process.
Accelerates electrical signoff with built-in comprehensive rule-sets or customized rule checks for issues affecting EMI/EMC, signal integrity, and power integrity.
HyperLynx Full-Wave Solver
A powerful 3D, broadband, full-wave electromagnetic solver providing unprecedented speed and capacity, while preserving gold-standard Maxwell accuracy.
Frontline InStack Design
An automatic stackup design solution to find the best possible stackup for your board, optimizing and balancing between quality, manufacturability and price.
Special live presentations include:
- Modeling and simulating DDR transactions involving buffer transitions between receive and transmit states
- Channel Operating Margin (COM) for PAM-4 links with support for Tx non-linearity and time skew
- Optimization methods for high speed SerDes channels using COM metric
Mentor has a copy of the DesignCon 2016 Best Paper Award winner available HERE. This paper analyzes the computational procedure specified for Channel Operating Margin and compares it to the traditional eye/BER analysis.
In concert, Mentor also has “A Practical, Hands-on Essential Principles of SI Boot Camp” featuring Eric Bogatin on January 31[SUP]st[/SUP] at their Fremont campus. From what I am told Eric is an SI guru so you are not going to want to miss this. In case you do miss it we will have a SemiWiki blogger there so stay tuned to SemiWiki.com for complete coverage.
If you are confused about signal integrity and want to get a jump start understanding the most important essential principles in signal integrity, this is the workshop for you. We will explore the principles and best design practices using simulation exercises in HyperLynx.
Using short lectures and demos, we introduce more than 50 important design examples everyone will work through as virtual prototypes.
Eric Bogatin received his BS in physics from MIT and MS and PhD in physics from the University of Arizona in Tucson. He has held senior engineering and management positions at Bell Labs, Raychem, Sun Microsystems, Ansoft and Interconnect Devices. He has written six technical books in the field and presented classes and lectures on signal integrity world wide.