Banner Electrical Verification The invisible bottleneck in IC design updated 1
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EDA

Electronic Design Automation

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Moving from SRAM to DDR DRAM in Safety Critical Automotive Systems

Moving from SRAM to DDR DRAM in Safety Critical Automotive Systems
by Eric Esteve on 12-20-2016 at 12:00 pm
Categories: Automotive, IP, Synopsys

Until now, most of the processors contained within automobiles could be served by SRAM, at the exception of infotainment systems relying on a more powerful CPU connected to DRAM, but these systems are non-safety-critical. Advanced Driver Awareness Systems (ADAS) and self-driving vehicle systems demand powerful processors… Read More

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Building a Virtual Prototype

Building a Virtual Prototype
by Bernard Murphy on 12-20-2016 at 7:00 am
Categories: EDA, Synopsys

I wrote recently about how virtual prototypes (in the form of VDKs) can help embedded software teams practice continuous integration. Synopsys has just released a white paper detailing a practical approach to building a VDK, using the Juno ARM development platform (ADP) to illustrate. Just as a reminder, the point of a virtual… Read More

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How ARM designs and optimizes SoCs for low-power

How ARM designs and optimizes SoCs for low-power
by Daniel Payne on 12-19-2016 at 12:00 pm
Categories: Arm, EDA, IP, Siemens EDA

ARM has become such a worldwide powerhouse in delivering processors to the semiconductor IP market because they have done so many things well: IP licensing model, variety, performance, and low-power. On my desk are two devices with ARM IP, a Samsung Galaxy Note 4 smart phone and a Google tablet. Most of my readers will likely have… Read More

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CEO Interview: Dündar Dumlugöl of Magwel

CEO Interview: Dündar Dumlugöl of Magwel
by Tom Simon on 12-19-2016 at 7:00 am
Categories: CEO Interviews, EDA, Magwel

Magwel CEO Dündar Dumlugöl is well known from his days at Cadence, where I first met him, and for his more recent tenure at Magwel. At Cadence he led the team that first developed Spectre. He has come a long way from the start of his career at IMEC in Belgium. He and I had a chance to have a conversation recently where he offered insights … Read More

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Reducing the Cost of SoC Testing

Reducing the Cost of SoC Testing
by Daniel Payne on 12-16-2016 at 12:00 pm
Categories: Automotive, Cadence, EDA

Every year certain technology themes appear, like at ITC this year a big theme was how to reduce the cost of SoC testing. I spoke with Rob Knoth of Cadence by phone to hear more about this cost of test theme. Rob gave me an example of an SoC that takes 27 seconds on a tester, so at $0.04 per second in test costs amounts to $1.08 per part. If you… Read More

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Design for Fanout Packaging

Design for Fanout Packaging
by Bernard Murphy on 12-12-2016 at 12:00 pm
Categories: EDA, Foundries, Siemens EDA, TSMC

In constant pursuit of improved performance, power and cost, chip and system designers always want to integrate more functions together because this minimizes inter-device loads (affecting performance and power) and bill of materials on the board (affecting cost). However it generally isn’t possible to integrate … Read More

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NVIDIA’s Deep Learning GPUs Driving Your Car!

NVIDIA’s Deep Learning GPUs Driving Your Car!
by Mitch Heins on 12-09-2016 at 4:00 pm
Categories: Automotive, EDA, IoT, Mobile

In a recent SemiWiki article it was noted that 5 of the top 20 semiconductor suppliers are showing double-digit gains for 2016. At the top of the list was NVIDIA with an annual growth rate of 35%. Most of this gain is due to sales of its graphics processors (GPUs) which one normally associates with high performance computer gaming engines.… Read More

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Managing International Design Collaboration

Managing International Design Collaboration
by Bernard Murphy on 12-09-2016 at 7:00 am
Categories: Cliosoft, EDA

Customer perspectives on a tool are always interesting, as much for why they felt the need for the tool as how it is working out for them in practice. Active-Semi, an emerging leader in power management and digital motor drive ICs gave a presentation at CDNLive describing why they adopted ClioSoft tools for design collaboration … Read More

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ARM and Mentor talk about Real Time Virtualization, Webinar

ARM and Mentor talk about Real Time Virtualization, Webinar
by Daniel Payne on 12-08-2016 at 12:00 pm
Categories: Arm, Automotive, EDA, IP, Siemens EDA

Processor cores come in a wide variety of speeds, performance and capabilities, so it may take you some time to find the proper processor for your system. Let’s say that you are designing a product for the industrial, automotive, military or medical markets that has an inherent requirement for safety, security and reliability… Read More

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Mentor’s Battle of the Photonic Bulge

Mentor’s Battle of the Photonic Bulge
by Mitch Heins on 12-07-2016 at 4:00 pm
Categories: EDA, Siemens EDA, Silicon Photonics

A few weeks back I wrote an article mentioning that Mentor Graphics has been quietly working on solutions for photonic integrated circuits (PICs) for some time now, while one of their competitors has recently established a photonics beachhead. One of the most common challenges for PIC designs is their curvilinear nature, thus… Read More