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Electronic Design Automation
In July, I explored the benefits of the new Cadence Tempus™ Power Integrity Solution. In that piece, I explored some of the unique capabilities of this new tool with Brandon Bautz, senior product management group director and Hitendra Divecha, product management director in the Digital & Signoff Group at Cadence. I recently… Read More
In July, I covered a webinar that described how yieldHUB helps bring a new product to market. That webinar described how to implement new production introduction (NPI) using an array of tools and techniques that should be part of any semiconductor enterprise. In a recent article published by yieldHUB, they took a few steps back … Read More
Synopsys virtual events are high on my list for three reasons:
The ESD Alliance tracks revenue growth for a large number of EDA companies. Their recent report paints a positive picture in a landscape dotted with challenges and not-so-good news. The report cites 12.6% overall revenue growth for Q2 2020 vs. Q2 2019. Furthermore, the overall most recent four quarter revenue average has increased… Read More
Dean founded IC Manage in 2003, a company that he has helped expand to become the IC/SoC design and IP management technology leader. Dean was also founder, President and CEO of Barracuda Networks from 2003 to 2012, where he built and expanded Barracuda from a spam and virus firewall provider to a broad line enterprise technology … Read More
Cadence Virtuoso is by far the most popular layout tool for IC design. This is especially true at advanced process nodes. In my opinion one of the key reasons for this is its built-in extension language, SKILL. SKILL is a powerful tool to add time saving and customized functionality to the Virtuoso layout editor. For analog and custom… Read More
The idea of a digital twin is simple enough. You use a digital model of a car, aircraft, whatever to test design ideas and prove your design will be robust across a wide range of scenarios before you commit millions of dollars and lives to proving out the real thing. As Siemens have accomplished in their PAVE360 platform. There are a … Read More
On September 9 and 10 Altair held their high-performance computing virtual summit. Altair is a company with a large footprint. In their own words, “Altair is a global technology company that provides software and cloud solutions in the areas of data analytics, product development, and high-performance computing (HPC).” Their… Read More
RISC-V has been trending ever since it landed on SemiWiki in 2016. Even more so now that Arm is in flux with the Nvidia acquisition. Verification is a fast growing EDA challenge with the number of verification engineers steadily outpacing design, so this webinar is a best case scenario for SemiWiki traffic, absolutely.
Two things… Read More
I imagine that the title of this post will remind many of 80s synth-pop, or perhaps the movie The Breakfast Club. But my topic is the venerable hardware verification language (HVL) known simply as e. It has quite an interesting history and it played a key role in the development of the modern testbench methodology that most chip verification… Read More
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Memory Matters: Signals from the 2025 NVM Survey