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Making Functional Simulation Faster with a Parallel Approach

Making Functional Simulation Faster with a Parallel Approach
by Daniel Payne on 02-14-2017 at 12:00 pm

I’ll never forgot working at Intel on a team designing a graphics chip when we wanted to simulate to ensure proper functionality before tapeout, however because of the long run times it was decided to make a compromise to speed things up by reducing the size of the display window to just 32×32 pixels. Well, when first silicon… Read More


Aspirational Congruence

Aspirational Congruence
by Bernard Murphy on 02-07-2017 at 7:00 am

When talking to suppliers about their products, conversation tends to focus heavily on what they already have and why it is the answer to every imaginable need in their space. So it’s refreshing when a vendor wants to talk about where customers want to go without claiming they already have the answer wrapped up in a bow. I recently … Read More


Getting Ready for Bluetooth-5 Verification

Getting Ready for Bluetooth-5 Verification
by Bernard Murphy on 01-13-2017 at 7:00 am

Bluetooth has been very successful for many years, but arguably trapped in a niche, at least for us consumers, as a short-range wireless alternative to a wire connection – to connect your phone to a car or speakers for example. (In fairness I should add that the 4.2 version has improved range and Bluetooth has already become quite … Read More


Reducing the Cost of SoC Testing

Reducing the Cost of SoC Testing
by Daniel Payne on 12-16-2016 at 12:00 pm

Every year certain technology themes appear, like at ITC this year a big theme was how to reduce the cost of SoC testing. I spoke with Rob Knoth of Cadence by phone to hear more about this cost of test theme. Rob gave me an example of an SoC that takes 27 seconds on a tester, so at $0.04 per second in test costs amounts to $1.08 per part. If you… Read More


Cadence Design Secures Photonic Beachhead

Cadence Design Secures Photonic Beachhead
by Mitch Heins on 11-23-2016 at 12:00 pm

I had the privilege to attend a five-day PIC (photonic integrated circuit) training hosted by 7-Penniesand Tektronix in San Jose, CA this week. This training was quite comprehensive and covered photonic materials and platforms, design automation, fabrication, packaging and test. It also included invited talks from photonic… Read More


System-level Design for IoT and Automotive

System-level Design for IoT and Automotive
by Daniel Payne on 11-08-2016 at 12:00 pm

Several years ago a former EDA co-worker went to work for MathWorks, so I started paying a lot more attention to this privately held company that is well known for the MATLAB language and analysis environment. Engineers at MathWorks have created a graphical environment called Simulink for both simulation and model-based design… Read More


Automotive Semiconductor Safety

Automotive Semiconductor Safety
by Daniel Nenni on 11-05-2016 at 7:00 am

One of the more telling trends in the semiconductor industry is the “fabless systems companies” transformation. Systems companies that used to buy chips are now making their own to better control the system they are designing: from the chip, package, PCB, the complete system. Apple is the best example as they are now one of the most… Read More


Protium for the win in software development

Protium for the win in software development
by Don Dingee on 11-02-2016 at 4:00 pm

Cadence Design Systems is a long-standing provider in hardware emulation, but a relative newcomer to FPGA-based prototyping. In an upcoming lunch and learn session on November 11 in San Jose, Cadence teams will be outlining their productivity strategy. What’s different with their approach and why is this worth a lunch?… Read More


Fabless Photonic Design Flow Takes Shape as Cadence teams up with Lumerical and PhoeniX

Fabless Photonic Design Flow Takes Shape as Cadence teams up with Lumerical and PhoeniX
by Mitch Heins on 10-21-2016 at 4:00 pm

This week Cadence Design, Lumerical Solutions and PhoeniX Software hosted a two-day photonic summit and workshop. The first day had nearly 100 registered participants and featured industry leaders from Global Foundries, UCSB, MIT, Hewlett Packard Enterprise, General Electric, Boeing, Rockley Photonics, and Juniper Networks… Read More


The Fabless Empire Strikes Back, Global Foundries and Cadence make moves into Integrated Photonics!

The Fabless Empire Strikes Back, Global Foundries and Cadence make moves into Integrated Photonics!
by Mitch Heins on 10-20-2016 at 4:00 pm

In August I wrote an article proclaiming Score 1 for IDMs vs Fabless and discussedIntel’sannouncement of volume production of their 100G PSM4 and 100G CWDM4 transceiver products.

This week the Fabless Empire strikes back.
Daniel Nenni and I attended a two-day Photonic Summit and workshop hosted by Cadence Design, PhoeniX Software
Read More