WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 604
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 604
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
    [is_post] => 
)
            
14173 SemiWiki Banner 800x1001
WP_Term Object
(
    [term_id] => 15
    [name] => Cadence
    [slug] => cadence
    [term_group] => 0
    [term_taxonomy_id] => 15
    [taxonomy] => category
    [description] => 
    [parent] => 157
    [count] => 604
    [filter] => raw
    [cat_ID] => 15
    [category_count] => 604
    [category_description] => 
    [cat_name] => Cadence
    [category_nicename] => cadence
    [category_parent] => 157
    [is_post] => 
)

The CDNLive Keynotes

The CDNLive Keynotes
by Bernard Murphy on 04-25-2017 at 7:00 am

I’m developing a taste for user-group meetings. In my (fairly) recently assumed role as a member of the media, I’m only allowed into the keynotes, but from what I have seen, vendors work hard to make these fresh and compelling each year through big-bang product updates and industry/academic leaders talking about their work in bleeding-edge… Read More


Virtual Reality

Virtual Reality
by Bernard Murphy on 04-20-2017 at 7:00 am

In the world of hardware emulators, virtualization is a hot and sometimes contentious topic. It’s hot because emulators are expensive, creating a lot of pressure to maximize return on that investment through multi-user sharing and 24×7 operation. And of course in this cloud-centric world it doesn’t hurt to promote cloud-like… Read More


A New Product for DRC and LVS that Lives in the Cloud

A New Product for DRC and LVS that Lives in the Cloud
by Daniel Payne on 04-17-2017 at 12:00 pm

Back in the day the Dracula tool from Cadence was king of the DRC and LVS world for physical IC verification, however more recently we’ve seen Calibre from Mentor Graphics as the leader in this realm. Cadence wanted to reclaim their earlier prominence in physical verification so they had to come out with something different… Read More


SPIE 2017 ASML and Cadence EUV impact on place and route

SPIE 2017 ASML and Cadence EUV impact on place and route
by Scotten Jones on 04-13-2017 at 7:00 am

As feature sizes have shrunk, the semiconductor industry has moved from simple, single-exposure lithography solutions to increasingly complex resolution-enhancement techniques and multi-patterning. Where the design on a mask once matched the image that would be produced on the wafer, today the mask and resulting image … Read More


Cadence Expands Integrated Photonics Beachhead

Cadence Expands Integrated Photonics Beachhead
by Mitch Heins on 03-30-2017 at 4:00 pm

In November of 2016, I made a bold statement that October 20, 2016 would stand as a watershed day in integrated photonics. The reason for this claim was that GLOBALFOUNDRIES proclaimed that integrated photonics was real and here to stay. The same week I wrote an article about Cadence Design Systems securing a photonic beachhead … Read More


Anirudh on Verification

Anirudh on Verification
by Bernard Murphy on 03-13-2017 at 7:00 am

I was fortunate to have a 1-on-1 with Anirudh before he delivered the keynote at DVCon. In case you don’t know the name, Dr. Anirudh Devgan is Executive VP and GM of the Digital & Signoff Group and the System & Verification Group at Cadence. He’s on a meteoric rise in the company, not least for what he has done for Cadence’s position… Read More


Perspective in Verification

Perspective in Verification
by Bernard Murphy on 03-07-2017 at 7:00 am

At DVCon I had a chance to discuss PSS and real-life applications with Tom Anderson (product management director at Cadence). Tom is very actively involved in the PSS working group and is now driving the Cadence offering in this area (Perspec System Verifier), so he has a pretty good perspective on the roots, the evolution and practical… Read More


Simulation done Faster

Simulation done Faster
by Bernard Murphy on 02-28-2017 at 7:00 am

When it comes to functional verification of large designs, huge progress is being made in emulation and FPGA-based prototyping (about which I’ll have more to say in follow-on blogs), but simulation still dominates verification activity, all the way from IP verification to gate-level signoff. For many, while it is much slower… Read More


Prototyping: Sooner, Easier, Congruent

Prototyping: Sooner, Easier, Congruent
by Bernard Murphy on 02-28-2017 at 7:00 am

DVCon 2017 is a big week for Cadence verification announcements. They just released their Xcelium simulation acceleration product (on which I have another blog) and they have also released their latest and greatest prototyping solution in the Protium S1. This is new hardware based on Virtex UltraScale FPGAs on Cadence-designed… Read More


PowerTree — a data repository and simulation platform for PCB power distribution networks

PowerTree — a data repository and simulation platform for PCB power distribution networks
by Tom Dillinger on 02-24-2017 at 12:00 pm

The difficulty of managing the power domains on a complex SoC led to the development of a power format file description, to serve as the repository for data needed for functional and electrical analysis (e.g., CPF, UPF). Yet, what about complex printed circuit boards? How can the power domain information be effectively represented… Read More