How to Live with Rapid Changes During Early Development of IP

How to Live with Rapid Changes During Early Development of IP
by Tom Simon on 10-30-2015 at 4:00 pm

Best practices call for using a version control system with systematic releases when developing IP. However, in the early stages of IP development using a rigid version control system with a cumbersome release process can hinder productivity. To fully understand how this works we should start by defining what is meant when we … Read More


Why Your IP Release Methodology Can Make or Break Reuse Success

Why Your IP Release Methodology Can Make or Break Reuse Success
by Tom Simon on 10-24-2015 at 7:00 am

When the term IP first came into popular usage for IC design, it was primarily conceived as blocks of design content that were bought occasionally from external sources. A customer might use one or two in a design, and expect one delivery with perhaps some minor updates before tapeout. Over the last 18 years, this notion has changed… Read More


How Virtualization Makes Network Processor Verification Efficient

How Virtualization Makes Network Processor Verification Efficient
by Tom Simon on 10-22-2015 at 7:00 am

When Ethernet was introduced in 1983 it ran at 10Mbps and mostly relied on hubs and coaxial cable. Twelve years later a faster speed was introduced, running at 100Mbps. Since then we have seen an acceleration of new data rate introductions. According top the Ethernet Alliance, Ethernet could have 12 speeds before 2020, with 6 of … Read More


Why ARM Enabling Easy Access to Customized SOC’s Matters

Why ARM Enabling Easy Access to Customized SOC’s Matters
by Tom Simon on 10-14-2015 at 7:00 am

The introduction of the Arduino heralded the huge growth and interest in MCU based designs by people who could never before easily put together the hardware and software system required for implementation of their ideas. I remember the first time I saw the Arduino in use. I was at a talk on how a system for controlling propane jet solenoids… Read More


Processors Rule the Day

Processors Rule the Day
by Tom Simon on 10-09-2015 at 7:00 pm

It used to be that if you went to a processor conference, you could expect to spend hours listening to talks about pipelining, cache schemes and processor architecture. Well, I went to the Linley Processor Conference this week in Santa Clara and found the topics pretty compelling. Processors are in just about everything. It is easier… Read More


Cadence Outlines Automotive Solutions at TSMC OIP Event

Cadence Outlines Automotive Solutions at TSMC OIP Event
by Tom Simon on 10-08-2015 at 12:00 pm

I used to joke that my first car could survive a nuclear war. It was a 1971 Volvo sedan (142) that was EMP proof because it had absolutely no semiconductors in the ignition system, just points, condensers and a coil. If you go back to the Model T in 1915 you will see that the “on-board electronics” were not that different. However, today’s… Read More


How to Build an IoT Endpoint in Three Months

How to Build an IoT Endpoint in Three Months
by Tom Simon on 09-27-2015 at 7:00 am

It is often said that things go in big cycles. One example of this is the design and manufacturing products. People long ago used to build their own things. Think of villagers or settlers hundreds of years ago, if they needed something they would craft it themselves. Then came the industrial revolution and two things happened. One… Read More


Why Sidense OTP is Like the Armored Car of NVM

Why Sidense OTP is Like the Armored Car of NVM
by Tom Simon on 09-23-2015 at 4:00 pm

I have written about Sidense before, but last week at the TSMC Open Innovation Platform Forum, I had a chance to hear a talk by, and have lunch with Betina Hold Director of R&D at Sidense. Here is what I learned.

Sidense has been focusing on the growing market in what they like to call the smart connected universe. It is best to think… Read More


Enterprise Design Management Comes of Age

Enterprise Design Management Comes of Age
by Tom Simon on 09-22-2015 at 12:00 pm

The motivations for having a data and process management system in place for semiconductor design have existed for a long time. I am reluctant to admit it, but I remember early efforts to do this back in the 80’s at Valid Logic. Cadence was also developing this capability in house through the early 90’s. Back then designs were much … Read More


How MunEDA Helps Solve the Difficulties of AMS/RF IP Reuse

How MunEDA Helps Solve the Difficulties of AMS/RF IP Reuse
by Tom Simon on 09-08-2015 at 12:00 pm

Reusing design IP is crucial for competitiveness. The need for reuse occurs with new designs on the same process node as the original design, new designs at the same node but using a different PDK or foundry, or designs on a different process node – usually smaller. However, achieving effective IP reuse has always been a challenge.… Read More