My oldest son just upgraded Smart Phones from a 3″ display to a 4.5″ display and was shocked to discover that his battery barely lasted 8 hours, so I welcomed him to the reality of limited battery life in modern SoC-based mobile devices. There is some hope in increasing battery life for our consumer-oriented devices … Read More
Author: Daniel Payne
High Performance or Cycle Accuracy? You can have both
SoC designers have always wanted to simulate hardware and software together during new product development, so one practical question has been how to trade off performance versus accuracy when creating an early model of the hardware. The creative minds at Carbon Design Systems and ARM have combined to offer us some hope and relief… Read More
Power, Signal and Thermal Updates from ANSYS at DesignCon
DesignConis next week in Santa Clara, so today I spoke with Mark Ravenstahlfrom ANSYS to get an idea of what to expect at the conference and trade show.
Using IC Data Management Tools and Migrating Vendors
Non-volatile memory is used in a wide variety of consumer and industrial applications and comes in an array of architectures like Serial Flash and CBRAM (Conductive Bridging RAM). I caught up with Shane Hollmer by phone this week to gain some insight into a recent acquisition of Atmel’s serial flash components, and how that… Read More
Double Patterning for IC Design, Extraction and Signoff
TSMC and Synopsys hosted a webinar in December on this topic of double patterning and how it impacts the IC extraction flow. The 20nm process node has IC layout geometries so closely spaced that the traditional optical-based lithography cannot be used, instead lower layers like Poly and Metal 1 require a new approach of using two… Read More
Is the RTL Design Flow Broken?
I’ve taught Verilog classes and used logic synthesis tools for ASIC and FPGA designs, so was interested to hear about Oasys Design Systems. I attended their webinar at 9AM today, so I’ll share what I learned about their approach to logical and physical synthesis. This approach competes with tools like Design Compiler… Read More
IC Design at Analog Bits
This morning I spoke with Mahesh Tirupattur, Executive VP of Analog Bits about IC design challenges and using EDA tools to create high performance, mixed-signal semiconductor IP.
Online Schematic Capture and SPICE Circuit Simulation
I love all things SPICE so when I read a tweet tonight from @PartSimI just had to try out their Schematic Capture and SPICE circuit simulator in a browser. The site is www.partsim.com and all you need is a web browser and short registration process, then it’s off to the Examples where I found a simple CMOS inverter and then extended… Read More
Engineer to Engineer, Embedded Instrumentation
Last month the folks at Tektronix did something very useful, they invited 30 engineers to talk directly with their chief engineer of embedded instrumentation as part of “Meet the Experts” in Santa Clara, CA.
Brad Quinton, Chief Architect created a new and efficient approach of embedding instrumentation in your … Read More
Phablet, e-reader, Nexus
In November and December I upgraded three devices and share my opinions on the utility of each:
- Samsung Galaxy Note (aka Phablet = Phone + Tablet)
- Kindle Paperwhite (e-reader)
- Google Nexus 7 (Tablet)
Selling the Forges of the Future: U.S. Report Exposes China’s Reliance on Western Chip Tools