For ASIC design teams, the gap between RTL simulation and first silicon remains one of the most consequential stages of the development cycle. Simulation provides controllability and visibility, but it cannot always reproduce the software workloads, interface behavior, clock interactions, and sustained system activity… Read More
Author: Daniel Nenni
ASIC-to-FPGA Turnkey Prototyping Bundle: A Practical Path to Earlier Hardware Validation
Interview with Simon Davidmann, AI + EDA Researcher and Former CEO of Imperas
Simon Davidmann is a renowned EDA industry pioneer and serial technology entrepreneur with more than 40 years of experience in simulation and verification. After Synopsys acquired Imperas, which he founded in 2005, he was Synopsys Vice President responsible for Processor Modeling and Simulation. He left Synopsys in 2025 and… Read More
Quadric Extends Series C to $46 Million as Edge AI Demand Accelerates
Quadric has extended its Series C financing to $46 million through a second close led by the International Finance Corporation, the private-sector investment arm of the World Bank Group. The transaction raises Quadric’s total capital secured to approximately $90 million and strengthens its ability to commercialize programmable… Read More
Security by Design: Arteris Expands Its Partnership with Arm
Arteris has expanded its partnership with Arm to deploy Cycuity Radix hardware security assurance technology across additional next-generation Arm central processing unit (CPU) programs. The expansion follows five years of collaboration and successful use of Cycuity Radix on select Arm CPU designs, and it moves hardware… Read More
CEO Interview with Ann Wu and Akash Levy of Silimate
Ann Wu is Co-founder & CEO of Silimate. Before Silimate, Ann designed several generations of custom silicon at Apple, helped manage inference ASIC programs at Meta, and led product strategy and execution at Celestial AI. Ann has a M.S. in Electrical Engineering from Stanford University and a B.S. in Electrical Engineering… Read More
Five Myths about the Current Memory Boom
The current semiconductor memory boom is mainly an AI-driven capacity-allocation problem, not simply a lack of factories.
AI accelerators require enormous quantities of high-bandwidth memory, or HBM. HBM is used alongside GPUs and custom AI chips because it can move data much faster than ordinary server memory. As companies… Read More
CEO Interview with Ohad Agami of Hiveware
Ohad Agami is the co-founder and CEO of Hiveware, a semiconductor verification company he started in Tel Aviv in 2023 with CTO Yaniv Pascal. He has a systems-focused engineering background with deep experience in semiconductor architectures and complex verification flows, built at the AI chip company Hailo and earlier in Israel’s… Read More
TSMC CoPoS Versus Intel EMIB Semiconductor Packaging
TSMC’s CoPoS, generally described as Chip-on-Panel-on-Substrate, and Intel’s EMIB, or Embedded Multi-die Interconnect Bridge, address the same strategic problem: integrating increasingly large, heterogeneous chiplet systems. However, they attack different physical constraints. CoPoS is an emerging panel-level … Read More
The Silicon Shield Has Never Been Stronger!
The “Silicon Shield” describes the idea that Taiwan’s central role in advanced semiconductor manufacturing raises the economic and strategic cost of military action against the island. The shield is not a literal defense system. It is a form of structural deterrence created by technological concentration: governments and… Read More
BRONCO AI: WIN THE RACE TO TAPE-OUT | BOOTH 935
Bronco AI builds AI agents for chip design and verification. Our goal is to get teams from spec to RTL-freeze as fast as possible by surfacing the nastiest bugs sooner and fixing them faster.
Our agents work the way strong engineers do: they read the spec, form hypotheses, run experiments, and chase a problem until it is root-caused,… Read More
A Primer on EUV Lithography