Meeting Automotive IC Design Challenges for Safety using On-Chip Sensors

I’ve been driving cars since 1978 and have even done a few DIY repairs in the garage, so I know how warm the engine compartment, transmission or exhaust system can become which makes automotive IC design rather unique in terms of the high temperature and voltage ranges that an electronic component is subjected to. Our safety while driving a car is paramount, so automotive designers have a big responsibility to manage the electronic subsystems that are hidden from view. Recent advances in ADAS (Advanced Driver Assistance Systems) by the major automotive companies along with EV startups like Tesla, are also adding an unprecedented number of ICs and sensors like RADAR and LiDAR to our vehicles.

ADAS Features. Source: Robotics & Automation

Ideally then, at the chip-level, your designers would like to know what the Process variation, Voltage levels and local Temperatures (PVT) are so that they can control the chip operation, keeping it operating safely and within specifications, instead of failing from heat-induced electromigration failures or supply voltages out of spec. Let me just summarize some of the automotive IC design challenges:

• Reliability
• Adherence to standards like ISO 26262
• Long term commitment from suppliers
• Monitoring aging effects
• Drift
• Safety
• Long development cycles

ISO 26262. Source: National Instruments

ITRI Industrial International forecasts an 11.9% annual growth rate for automotive electronics from 2017 to 2022, so that has the IC design community highly motivated to design new chips to meet the challenges of ADAS. On the infotainment side our cars are becoming mobile hotspots, enabling us to enjoy non-stop smart phone use along with new ways of controlling the car dashboard with our voice or touching a screen.

Chips inside of cars can use bleeding edge 7nm silicon from Samsungor TSMC, all the way up to mature 180nm nodes. The smaller the node, the greater the impact of process variation has on the reliability. If you knew which process corner each block was operating under, then you could take design steps to control the frequency and voltage levels in order to stay within your power spec for example.

Thermal effects continue to be important for automotive ICs:

• FinFET structures are less able to dissipate heat than planar CMOS
• Increased density is leading to increased thermal challenges
• Electrical OverStress (EOS)
• Electromigration (EM)
• Hot carrier aging
• Increased Negative Bias Temperature Instability (NBTI)
• Device leakage causes heat and heat causes more leakage (Thermal runaway)
• Leakage to increase when we move from one FinFET node to the next smaller node

Ashish Kumar Gupta from Freescale Semiconductors summarizes thermal concerns, “Designers face new challenges of providing thermal-efficient systems that balance or equally distribute possible on-chip hot spots. In this scenario, Dynamic Temperature Management (DTM) techniques arise as a promising solution. DTM relies on accurately sensing and managing on-chip temperature, both in space and time, by optimally allocating smart temperature sensors in the silicon.“

Fortunately for new chip designs targeted at automotive you don’t have to create your own semiconductor IP for PVT monitoring, because there’s a vendor focused solely on PVT monitoring fabrics, Moortec. They are members of the TSMC IP Allianceand have over a decade of experience in this domain. Their in-chip monitoring subsystem IP is silicon proven at 40nm, 28nm, 16nm, 12nm and 7nm, so that’s a wide range to choose from. In addition the IP that Moortec supplies to TSMC users has passed the rigors of the TSMC9000 quality program.

Source: TSMC

Engineers want to know how all of the pieces fit together for IP, so here’s a diagram that shows the concept of connecting multiple PVT monitors and a subsystem to control them.

PVT Sub-system

For automobiles the environmental temperature range is typically -40C to 125C, but the junction temperature of the IC is going to be even hotter than 125C worst case based on the number of transistors, process node, operating frequency and voltage levels. Having multiple Temperature monitors on-chip is a wise choice in managing the thermal specification. As a chip reaches its thermal limits then the control logic can be used to lower voltage levels, decrease frequency or a little of both.

As IC designers identify thermal hotspots in the layout, then engineers can judiciously place Thermal monitors around the chip in order to measure junction temperatures in realtime, then take corrective action when needed.

Summary
The process variation, voltage variation and thermal challenges of designing automotive ICs can be met by placing multiple PVT monitor IP blocks as a fabric across your chip. Moortec is the leader in PVT monitoring subsystems from 40nm through 7nm nodes and has plenty of silicon proven results and use case experience, so that you can quickly use their IP and control how your chips react to variations, keeping them safe and operating within spec.

Related Blogs

• Accuracy of In-Chip Monitoring for Thermal Guard-banding
• A Smart Way for Chips to Deal with PVT Issues
• Optimization and Reliability for FinFET designs at #55DAC