Managing and controlling thermal conditions in-chip is nothing new and embedded temperature monitoring has been going on for many years. What is changing however, is the granularity and accuracy of the sensing now available to SoC design teams. Thermal activity can be quite destructive and if not sufficiently monitored can cause over-heating and excessive power consumption which in turn can impact device longevity and reliability.
In other walks of life we are very thermally aware, you wouldn’t go on a long journey in your car without occasionally glancing at the temperature gauge on your dashboard or bake a cake without accurately controlling the temperature of your oven. The cost of failure with these examples are several orders of magnitude lower than your SoC, so why gamble, why would you not take even more care of your device? You wouldn’t? Right? Yet many companies are doing just that and not investing in this kind of technology at the early design phase, leaving them open to chip level thermal issues, which in turn, have a measurable impact on the system performance.
The car and cake examples are only single point checks. In an SOC you need to have greater visibility, to read multiple probe points giving you precise thermal measurements beside or within CPU cores, high speed interfaces or high activity circuitry. This type of extended functionality is now a critical requirement for chips operating within any large complex device. Moortec’s recently announced addition to their existing embedded in-chip sensing fabric, has this very functionality and its adoption in AI, Data Center and 5G devices would suggest a credible solution now exists.
For some time there has been a demand for tighter, deeper thermal control of semiconductor devices…now you have an efficient means of implementing it… so now, not only will the water in your car radiator not boil and your cakes not burn, but your SoC is also far less likely to overheat!
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