GSA Silicon Summit

Every year the GSA holds the GSA Silicon Summit. This year it is on April 10th at the Computer History Museum. It runs from 9am until 2.15pm. This year the focus is mostly on technologies other than simply scaling semiconductor technology. The meeting is divided into 3 sessions, each of which starts with a presentation and then is followed by a panel session. The participants are still being finalized but the topics can be announced.

The first session is on Implications of Nanoscale Manufacturing. Joe Sawicki of Mentor will moderate. The session will open with an overview detailing the challenges of continued gate scaling, as well as the industry’s exploration of alternative materials and processes in the fabrication of nanoscale structures and the resulting applications that may be enabled. A panel discussion will follow to address some of the challenges involved in implementing alternative CMOS solutions as well as recent advancements made in nanoscale engineering.

The second session is on Innovation in a Heterogeneous Integration Era. The session will open with an overview on how manufacturing and packaging innovation driven by heterogeneous integration is fueling new opportunities and helping manufacturers propel such visions as the IoT and Sensory Swarms. A panel discussion will follow and explore the current and future advances of integrating digital, RF, analog/mixed-signal, memory and sensors in close proximity to achieve increased performance from a scaling, material and process perspective.

The Internet of Things (IoT) is one of those terms that means different things to different people, but given that the devices are likely to be extremely low power, low cost and contain a selection of sensors, it is clear that this is very different from the smartphone business. The integration is likely to be using innovative packaging rather than simply doing everything at 16nm.

The third session is on Enabling a 2.5D Ecosystem. Holding great promise for enabling heterogeneous integration and reducing design complexity, this session will provide an overview on where the industry stands in terms of developing and commercializing 2.5D technology and what remains to be done. A panel discussion will follow and address the use case for utilizing 2.5D technology, as well as the business needs within the supply chain in order to ignite 2.5D adoption and market growth, changing it if possible, from a nascent alternative to a mature option.

I think 2014 will turn out to be the year that 3D chips become real, at least in two forms: stacked memory and 2.5D interposer-based designs. At the end of last year Micron announced that the Hybrid Memory Cube will ship in production volumes this year, and Xilinx announced a family of FPGAs that are manufactured using interposer technology. Talking to EDA companies, there are obviously several other pilot programs at their customers. The general feeling at the 3D conference in Burlingame in December was that once these sorts of products ship in volume so that several million units have been manufactured, then the costs will come down a lot and this form of integration will become very attractive.

Register to attend here.

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