The GSA Memory+ conference Taiwan will take place on (Halloween!) October 31, 2013 at the Regent Taipei, Taiwan. The main theme of this year is highlighting Memory—the Critical Enabler for Prominent and Emerging Applications in System Logic Solutions.
GSA Memory+ Conference is the global industry event dedicated to all memory companies, system houses, and semiconductor companies. In its fourth year, the conference will feature senior executives from leading companies in the memory, logic and system houses to share their perspectives and insights regarding future memory applications, viable business models and collaborative opportunities among Logic devices and memory technologies & solutions. The main theme(s) of GSA Memory+ Conference this year include:
- Emerging memory technologies
- 3D IC design and test
This event brings over 250 professionals together from memory, fabless, foundry and IDM; key suppliers including OSAT, IP, and EDA service providers; as well as OEM, ODM and system houses. It is organized by GSA in conjunction with the Taiwan Semiconductor Industry Association (TSIA) and the Smart electronics Industry Promotion Office (SIPO).
The opening keynote is by Shozo Saito, Senior Adviser, Principal Office, Toshiba Corporation on Memory Technology Challenges for the Next Innovation
Then Dr. Ronald Black, President & Chief Executive Officer, Rambus on Driving the Need for Innovative Memory Solutions
There is a keynote about memory of a different sort at lunch by Dr. Erik Chang, Associate Professor, Institute of Cognitive Neuroscience, National Central University on Brain and Memory: The Biological Foundation of Mental Time Travel
The final keynote just after lunch is by Dr. Tae-Sung Jung, Executive Vice President (CTO) of Device Solution, Samsung Electronics Co onNew Waves of Memory Technology in Mobile & Cloud Revolution
There are also featured presentations from:
- Dr Michael Wang of Macronix (title tbd)
- Barry Hoberman of Spin Transfer Technologies on Why Spin-Transfer-Based MRAM Will Soon Make Major Market Impact.
The day wraps up with three presentations on 3D ICs:
- Jerry Tzou of TSMC on 3DIC enablement
- Dr. Vassilios Gerousis of Cadence on 3DIC Design Technology: Where Are We?
- C.H. Wu of Advantest on Stacked Memory Test Challenges