Samsung is Starting 7nm Production with EUV in June

Samsung is Starting 7nm Production with EUV in June
by Scotten Jones on 04-16-2018 at 12:00 pm

There is a report in the Seoul Economic Daily that Samsung has completed development of their 7nm process using EUV and that production will begin in June. What is claimed in the report is:

  • The process is installed in the Hwaseong S3 Fab
  • Samsung has more than 10 EUV systems installed
  • Production starts in June with Qualcomm, Xilinx,
Read More

FPGA, Data and CASPA: Spring into AI

FPGA, Data and CASPA: Spring into AI
by Alex Tan on 03-21-2018 at 12:00 pm

Just like good ideas percolate longer, we have seen AI adoption pace picking-up speed, propelled by faster GPUs. Some recent data points provide good indication that FPGA making a comeback to bridge chip-design needs to keep-up with AI’s ML applications.

According to the Deloitte research firm there is a projected increase of… Read More


Webinar: Achieve High-performance and High-throughput with Intel based FPGA Prototyping

Webinar: Achieve High-performance and High-throughput with Intel based FPGA Prototyping
by Daniel Nenni on 03-19-2018 at 12:00 pm

FPGAs have been used for ASIC prototyping since the beginning of FPGAs (1980s) allowing hardware and software designers to work in harmony developing, testing, and optimizing their products. We covered the history of FPGAs in Chapter 3 of our book “Fabless: The Transformation of the Semiconductor Industry”, which includes … Read More


2017 in Review and 2018 Forecast

2017 in Review and 2018 Forecast
by Daniel Nenni on 12-30-2017 at 7:00 am

This has been an amazing year for me both personally and professionally. Personally we are now empty nest and have our first grandchild. SemiWiki is prospering, a company that I have been involved with for ten years (Solido Design) had a very nice exit, and my time promoting semiconductor stocks to Wall Street paid off with the PHLXRead More


When Invaluable Kills Business

When Invaluable Kills Business
by Frederic Leens on 12-11-2017 at 7:00 am

Productivity is notoriously hard to sell. I recently visited a company where the engineering team wanted to evaluate one of our FPGA debug and analysis products on an existing board. This board had an FPGA that we supported and had all the required connectivity – it could just be used ‘out of the box’. Our tool – ExostivRead More


TSMC OIP Ecosystem Forum 2017 Preview!

TSMC OIP Ecosystem Forum 2017 Preview!
by Daniel Nenni on 08-23-2017 at 12:00 pm

The TSMC OIP Ecosystem Forum is upon us again. I have yet to meet a disappointed attendee so it is definitely worth your time: Networking with more than 1,000 semiconductor professionals, the food, mingling with the 50+ EDA, IP, and Services Companies, the food, and of course the content. The 7nm and 7nm EUV updates alone are worth… Read More


HW and SW Co-verification for Xilinx Zynq SoC FPGAs

HW and SW Co-verification for Xilinx Zynq SoC FPGAs
by Daniel Payne on 07-03-2017 at 12:00 pm

It constantly amazes me at how much FGPA companies like Xilinx have done to bring ARM-based CPUs into a programmable SoC along with FPGA glue logic. Xilinx offers the Zynq 7000 and Zynq UltraScale+ SoCs to systems designers as a way to quickly get their ideas into the marketplace. A side effect of all this programability and flexibility… Read More


The FPGA Business Just Got Interesting Again!

The FPGA Business Just Got Interesting Again!
by Daniel Nenni on 06-14-2017 at 8:00 am

FPGA’s have played an important role in the fabless semiconductor ecosystem which is why it has a full chapter in our book Fabless: The Transformation of the Semiconductor Industry. Along my career path I spent time at a start-up FPGA so I know how hard it is. I worked for GateField which was then acquired by FPGA pioneer Actel… Read More


A Self-Contained Software-Driven Prototype

A Self-Contained Software-Driven Prototype
by Bernard Murphy on 04-26-2017 at 7:00 am

You’re building an IP, subsystem or SoC and you want to use a prototype together with a software testbench to drive extensive validation testing. I’m not talking here about the software running on the IP/SoC processor(s); the testbench should wrap around the whole DUT. This is a very common requirement. The standard approach to… Read More