Thanks to SemiWiki readers for the feedback and comments on the previous “Introduction to FinFET Technology” posts – very much appreciated! The next installment on FinFET modeling will be uploaded soon.
In the interim, Dan forwarded the following link to me “ Intel’s FinFETs too complicated and difficult, says … Read More
Rajiv Bhateja, Dhrumil Gandhi and Neal Carney met with me at DAC on Wednesday to give an update on what’s new in 2012 for Tela Innovations, a provider of lithography optimized IP and tools. This team has a rich history in EDA and IP from companies like: ARM, Artisan, Mentor Graphics and Silicon Compilers.… Read More
At the TSMC Theater Apache (don’t forget, now a subsidary of Ansys) talked about Emerging Challenges for Power, Signal and Reliability Verification on 3D-IC and Silicon Interposer Designs. The more I see about the costs and challenges of 20/22nm and below, the more I think that these 3D and 2.5D approaches are going to be … Read More
For a small company, Solido has some very large customers and partners, TSMC being on of them. Why? Because of the high yield and memory performance demand on leading edge technologies, that’s why.
Much has been made of and will continue to be said on the march of Moore’s Law. While economics of scale and performance vs. power… Read More
Ciranova presented a hierarchical custom layout flow used on several large advanced-node designs to reduce total layout time by about 50%. Ciranova itself does automated floorplanning and placement software with only limited routing; but since the first two constitute the majority of custom layout time, and strongly influence… Read More
Semiconductor manufacturing equipment has returned to growth after a falloff in the second half of 2011. Combined data from SEMI (U.S. andEuropean companies) and SEAJ (Japanese companies) show billings peaked at a three-month-average of $3.2 billion in May 2011. Bookings and billings began todrop in June 2011, with billings… Read More
Atrenta presented an update on the TSMC Soft IP Alliance Program at TSMC’s theater each day at DAC. Mike Gianfagna, Atrenta VP of Marketing, presented an introduction to SpyGlass, an overview of the program and a progress report. Dan Kochpatcharin, TSMC Deputy Director of IP Portfolio, was also there. Between Mike, Dan, and I there… Read More
I caught the Berkeley Design Automation presentation in the TSMC Theater, where Simon Young (BDA’s director of product marketing) described the Analog FastSPICE (AFS) nanometer circuit verification platform, built on their foundation of very fast, very accurate, high capacity circuit simulation.
BDA claims the AFS platform… Read More
Mark Twain remarked that everyone talks about the weather but nobody does anything about it. 3D ICs seems to be a bit like that. Over the last couple of years there have been lots of people talking about 3D but very little that has actually been manufactured. In addition to the weather, everyone talks about Xilinx’s 3D Virtex… Read More
What a great interview! Xilinx CEO Moshe Gavrielov is right on the money HERE where he credits the high 28nm yields to the “very intimate” linkage in process development with TSMC.… Read More
